Delay systems and methods using a variable delay SINC filter

A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: GARDEI WILLIAM F, PASTORELLO DOUGLAS F
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator GARDEI WILLIAM F
PASTORELLO DOUGLAS F
description A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving a signal from said first filter to apply an additional delay to the signal received by said first filter, and a second mechanism for activating the second filter to produce a delayed signal which is a function of a signal received from the first filter. The delay system further comprises a divider system for tracking times from a clock reference. The delay system implements a method of delaying a received signal by sampling a selected signal with a predetermined clock signal and producing the selected signal at a time delayed to the extent of a comparison of a reduced frequency clock with a predetermined value. The method further includes further delaying production of the selected signal with a second comparison utilizing a second predetermined value of a further reduced frequency clock.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6531906B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6531906B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6531906B23</originalsourceid><addsrcrecordid>eNrjZLBxSc1JrFQoriwuSc0tVkjMS1HITS3JyE8pVigtzsxLV0hUKEssykxMyklVSAErDfb0c1ZIy8wpSS3iYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocFmpsaGlgZmTkbGRCgBAEDRLs4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Delay systems and methods using a variable delay SINC filter</title><source>esp@cenet</source><creator>GARDEI WILLIAM F ; PASTORELLO DOUGLAS F</creator><creatorcontrib>GARDEI WILLIAM F ; PASTORELLO DOUGLAS F</creatorcontrib><description>A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving a signal from said first filter to apply an additional delay to the signal received by said first filter, and a second mechanism for activating the second filter to produce a delayed signal which is a function of a signal received from the first filter. The delay system further comprises a divider system for tracking times from a clock reference. The delay system implements a method of delaying a received signal by sampling a selected signal with a predetermined clock signal and producing the selected signal at a time delayed to the extent of a comparison of a reduced frequency clock with a predetermined value. The method further includes further delaying production of the selected signal with a second comparison utilizing a second predetermined value of a further reduced frequency clock.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY ; IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS ; RESONATORS</subject><creationdate>2003</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030311&amp;DB=EPODOC&amp;CC=US&amp;NR=6531906B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20030311&amp;DB=EPODOC&amp;CC=US&amp;NR=6531906B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GARDEI WILLIAM F</creatorcontrib><creatorcontrib>PASTORELLO DOUGLAS F</creatorcontrib><title>Delay systems and methods using a variable delay SINC filter</title><description>A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving a signal from said first filter to apply an additional delay to the signal received by said first filter, and a second mechanism for activating the second filter to produce a delayed signal which is a function of a signal received from the first filter. The delay system further comprises a divider system for tracking times from a clock reference. The delay system implements a method of delaying a received signal by sampling a selected signal with a predetermined clock signal and producing the selected signal at a time delayed to the extent of a comparison of a reduced frequency clock with a predetermined value. The method further includes further delaying production of the selected signal with a second comparison utilizing a second predetermined value of a further reduced frequency clock.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><subject>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</subject><subject>RESONATORS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2003</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLBxSc1JrFQoriwuSc0tVkjMS1HITS3JyE8pVigtzsxLV0hUKEssykxMyklVSAErDfb0c1ZIy8wpSS3iYWBNS8wpTuWF0twMCm6uIc4euqkF-fGpxQWJyal5qSXxocFmpsaGlgZmTkbGRCgBAEDRLs4</recordid><startdate>20030311</startdate><enddate>20030311</enddate><creator>GARDEI WILLIAM F</creator><creator>PASTORELLO DOUGLAS F</creator><scope>EVB</scope></search><sort><creationdate>20030311</creationdate><title>Delay systems and methods using a variable delay SINC filter</title><author>GARDEI WILLIAM F ; PASTORELLO DOUGLAS F</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6531906B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2003</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><topic>IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS</topic><topic>RESONATORS</topic><toplevel>online_resources</toplevel><creatorcontrib>GARDEI WILLIAM F</creatorcontrib><creatorcontrib>PASTORELLO DOUGLAS F</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GARDEI WILLIAM F</au><au>PASTORELLO DOUGLAS F</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Delay systems and methods using a variable delay SINC filter</title><date>2003-03-11</date><risdate>2003</risdate><abstract>A delay system includes a first filter configured for receiving a selected input signal and a first mechanism for activating the first filter to produce a delayed output signal which is a function of a selected input signal. The delay system further includes a second filter configured for receiving a signal from said first filter to apply an additional delay to the signal received by said first filter, and a second mechanism for activating the second filter to produce a delayed signal which is a function of a signal received from the first filter. The delay system further comprises a divider system for tracking times from a clock reference. The delay system implements a method of delaying a received signal by sampling a selected signal with a predetermined clock signal and producing the selected signal at a time delayed to the extent of a comparison of a reduced frequency clock with a predetermined value. The method further includes further delaying production of the selected signal with a second comparison utilizing a second predetermined value of a further reduced frequency clock.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US6531906B2
source esp@cenet
subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS
RESONATORS
title Delay systems and methods using a variable delay SINC filter
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T16%3A38%3A21IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=GARDEI%20WILLIAM%20F&rft.date=2003-03-11&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6531906B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true