Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates
Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the i...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | LOU PAMELA KOLLRACK MARC MICHAEL MAYDAN DAN LAW KAM S ROBERTSON ROBERT LEE ANGELA |
description | Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6444277B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6444277B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6444277B13</originalsourceid><addsrcrecordid>eNqNjDEKwkAQRdNYiHqHuYCFGkyvKDZWah0mm8nuwGZ32ZkIHsFbG8QipdWHz3tvXryvpC620MUMLaUorBwsYB9zcnEQEPZsYgB1HKBj3wvEoBE8ZkuAmRCsRxnBoRHNqCTQvMA46tmghyemSXoMoYJj66bX11oWsw690Oq3iwLOp_vxsh65miShoUBaP277siy3VXXY7P5APgyXTTY</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates</title><source>esp@cenet</source><creator>LOU PAMELA ; KOLLRACK MARC MICHAEL ; MAYDAN DAN ; LAW KAM S ; ROBERTSON ROBERT ; LEE ANGELA</creator><creatorcontrib>LOU PAMELA ; KOLLRACK MARC MICHAEL ; MAYDAN DAN ; LAW KAM S ; ROBERTSON ROBERT ; LEE ANGELA</creatorcontrib><description>Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CHEMICAL SURFACE TREATMENT ; CHEMISTRY ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL ; COATING MATERIAL WITH METALLIC MATERIAL ; COATING METALLIC MATERIAL ; DIFFUSION TREATMENT OF METALLIC MATERIAL ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL ; METALLURGY ; SEMICONDUCTOR DEVICES ; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020903&DB=EPODOC&CC=US&NR=6444277B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20020903&DB=EPODOC&CC=US&NR=6444277B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>LOU PAMELA</creatorcontrib><creatorcontrib>KOLLRACK MARC MICHAEL</creatorcontrib><creatorcontrib>MAYDAN DAN</creatorcontrib><creatorcontrib>LAW KAM S</creatorcontrib><creatorcontrib>ROBERTSON ROBERT</creatorcontrib><creatorcontrib>LEE ANGELA</creatorcontrib><title>Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates</title><description>Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CHEMICAL SURFACE TREATMENT</subject><subject>CHEMISTRY</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</subject><subject>COATING MATERIAL WITH METALLIC MATERIAL</subject><subject>COATING METALLIC MATERIAL</subject><subject>DIFFUSION TREATMENT OF METALLIC MATERIAL</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</subject><subject>METALLURGY</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNjDEKwkAQRdNYiHqHuYCFGkyvKDZWah0mm8nuwGZ32ZkIHsFbG8QipdWHz3tvXryvpC620MUMLaUorBwsYB9zcnEQEPZsYgB1HKBj3wvEoBE8ZkuAmRCsRxnBoRHNqCTQvMA46tmghyemSXoMoYJj66bX11oWsw690Oq3iwLOp_vxsh65miShoUBaP277siy3VXXY7P5APgyXTTY</recordid><startdate>20020903</startdate><enddate>20020903</enddate><creator>LOU PAMELA</creator><creator>KOLLRACK MARC MICHAEL</creator><creator>MAYDAN DAN</creator><creator>LAW KAM S</creator><creator>ROBERTSON ROBERT</creator><creator>LEE ANGELA</creator><scope>EVB</scope></search><sort><creationdate>20020903</creationdate><title>Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates</title><author>LOU PAMELA ; KOLLRACK MARC MICHAEL ; MAYDAN DAN ; LAW KAM S ; ROBERTSON ROBERT ; LEE ANGELA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6444277B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CHEMICAL SURFACE TREATMENT</topic><topic>CHEMISTRY</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL</topic><topic>COATING MATERIAL WITH METALLIC MATERIAL</topic><topic>COATING METALLIC MATERIAL</topic><topic>DIFFUSION TREATMENT OF METALLIC MATERIAL</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL</topic><topic>METALLURGY</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION</topic><toplevel>online_resources</toplevel><creatorcontrib>LOU PAMELA</creatorcontrib><creatorcontrib>KOLLRACK MARC MICHAEL</creatorcontrib><creatorcontrib>MAYDAN DAN</creatorcontrib><creatorcontrib>LAW KAM S</creatorcontrib><creatorcontrib>ROBERTSON ROBERT</creatorcontrib><creatorcontrib>LEE ANGELA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>LOU PAMELA</au><au>KOLLRACK MARC MICHAEL</au><au>MAYDAN DAN</au><au>LAW KAM S</au><au>ROBERTSON ROBERT</au><au>LEE ANGELA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates</title><date>2002-09-03</date><risdate>2002</risdate><abstract>Amorphous silicon thin films can be deposited onto large area glass substrates at high deposition rates by chemical vapor deposition using pressure of at least 0.8 Torr and temperatures of about 270-350° C. and fairly high gas flow rates of silane in a hydrogen carrier gas. The spacing between the inlet gas manifold and the substrate in the CVD chamber is maintained so as to maximize the deposition rate. Improved transistor characteristics are observed when the substrate is either exposed to a hydrogen plasma for a few seconds prior to high rate deposition of the amorphous silicon, or when a first layer of amorphous silicon is deposited using a slow deposition rate process prior to deposition of the high deposition rate amorphous silicon.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US6444277B1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS CHEMICAL SURFACE TREATMENT CHEMISTRY COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATIONOR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY IONIMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL COATING MATERIAL WITH METALLIC MATERIAL COATING METALLIC MATERIAL DIFFUSION TREATMENT OF METALLIC MATERIAL ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION INGENERAL METALLURGY SEMICONDUCTOR DEVICES SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THESURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION |
title | Method for depositing amorphous silicon thin films onto large area glass substrates by chemical vapor deposition at high deposition rates |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-05T12%3A13%3A46IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=LOU%20PAMELA&rft.date=2002-09-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6444277B1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |