DRAM circuit and its sub-word line driver

A dynamic random access memory (DRAM) circuit and its associated sub-word-line driver. The DRAM circuit includes a boost circuit, a main word line driver and a sub-word line driver. The boost circuit changes its output boost voltage, which lies between an internal supply voltage and an operating vol...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	MAO ROBERT, CHEN ISSAC Y, CHEN CHUNG-ZEN
Format:	Patent
Sprache:	eng
Schlagworte:	INFORMATION STORAGE PHYSICS STATIC STORES
Online-Zugang:	Volltext bestellen
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