Rapid execution of floating point load control word instructions

A microprocessor with a floating point unit configured to rapidly execute floating point load control word (FLDCW) type instructions in an out of program order context is disclosed. The floating point unit is configured to schedule instructions older than the FLDCW-type instruction before the FLDCW-...

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Bibliographische Detailangaben

Hauptverfasser:	MEIER STEPHAN G, MEYER DERRICK R, TRULL JEFFREY E, JUFFA NORBERT
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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