Analyzing CMOS circuit delay

A method and implementing system is provided in which input signal specifications, element internal delays and output loads, for each element in a circuit design, are utilized in an iterative processing engine to objectively determine and provide a timing rule database for a circuit being designed....

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MCCAULEY KEVIN WILLIAM, KODALI VISWESWARA RAO, SHAH SALIM AHMED, LEBLANC JOHNNY JAMES
Format: Patent
Sprache:eng
Schlagworte:
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