Semiconductor integrated circuit

The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: YAGISHITA YOSHIMASA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator YAGISHITA YOSHIMASA
description The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control circuit disables an operation of the memory core corresponding to the command control signal when the mask signal is activated. Illegal commands are decided by the mask circuit alone. On this account, the control circuit need not be provided with a circuit for individually determining commands as illegal in accordance with actual operating states. Therefore, using the mask circuit makes it possible to prevent malfunctions resulting from illegal commands with facility and reliability. The intrinsic functions of the control circuit have only to be verified at the time of design and circuit modifications, which results in improving design efficiency.
format Patent
fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6377509B2</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6377509B2</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6377509B23</originalsourceid><addsrcrecordid>eNrjZFAITs3NTM7PSylNLskvUsjMK0lNL0osSU1RSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWbG5uamBpZORsZEKAEAR-klnA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Semiconductor integrated circuit</title><source>esp@cenet</source><creator>YAGISHITA YOSHIMASA</creator><creatorcontrib>YAGISHITA YOSHIMASA</creatorcontrib><description>The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control circuit disables an operation of the memory core corresponding to the command control signal when the mask signal is activated. Illegal commands are decided by the mask circuit alone. On this account, the control circuit need not be provided with a circuit for individually determining commands as illegal in accordance with actual operating states. Therefore, using the mask circuit makes it possible to prevent malfunctions resulting from illegal commands with facility and reliability. The intrinsic functions of the control circuit have only to be verified at the time of design and circuit modifications, which results in improving design efficiency.</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2002</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20020423&amp;DB=EPODOC&amp;CC=US&amp;NR=6377509B2$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76302</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20020423&amp;DB=EPODOC&amp;CC=US&amp;NR=6377509B2$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>YAGISHITA YOSHIMASA</creatorcontrib><title>Semiconductor integrated circuit</title><description>The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control circuit disables an operation of the memory core corresponding to the command control signal when the mask signal is activated. Illegal commands are decided by the mask circuit alone. On this account, the control circuit need not be provided with a circuit for individually determining commands as illegal in accordance with actual operating states. Therefore, using the mask circuit makes it possible to prevent malfunctions resulting from illegal commands with facility and reliability. The intrinsic functions of the control circuit have only to be verified at the time of design and circuit modifications, which results in improving design efficiency.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2002</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZFAITs3NTM7PSylNLskvUsjMK0lNL0osSU1RSM4sSi7NLOFhYE1LzClO5YXS3AwKbq4hzh66qQX58anFBYnJqXmpJfGhwWbG5uamBpZORsZEKAEAR-klnA</recordid><startdate>20020423</startdate><enddate>20020423</enddate><creator>YAGISHITA YOSHIMASA</creator><scope>EVB</scope></search><sort><creationdate>20020423</creationdate><title>Semiconductor integrated circuit</title><author>YAGISHITA YOSHIMASA</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6377509B23</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2002</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>YAGISHITA YOSHIMASA</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YAGISHITA YOSHIMASA</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor integrated circuit</title><date>2002-04-23</date><risdate>2002</risdate><abstract>The command decoder decodes a command signal to generate a command control signal. The mask circuit receives the command control signal to recognize the operating state of the memory core thereafter, and activates a mask signal when the command signal to be supplied anew is unacceptable. The control circuit disables an operation of the memory core corresponding to the command control signal when the mask signal is activated. Illegal commands are decided by the mask circuit alone. On this account, the control circuit need not be provided with a circuit for individually determining commands as illegal in accordance with actual operating states. Therefore, using the mask circuit makes it possible to prevent malfunctions resulting from illegal commands with facility and reliability. The intrinsic functions of the control circuit have only to be verified at the time of design and circuit modifications, which results in improving design efficiency.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_epo_espacenet_US6377509B2
source esp@cenet
subjects INFORMATION STORAGE
PHYSICS
STATIC STORES
title Semiconductor integrated circuit
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-15T18%3A57%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=YAGISHITA%20YOSHIMASA&rft.date=2002-04-23&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6377509B2%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true