Method and apparatus for providing a clock generation circuit for digitally controlled frequency or spread spectrum clocking

An improved clock generation circuit is provided that operates with a single input clock frequency, and includes a Phase Locked Loop circuit (PLL) with a digital accumulator in the feedback loop, in which either the Most Significant Bit or the Carry Bit of the binary adder is used as the modulated f...

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Bibliographische Detailangaben

Hauptverfasser:	HARDIN KEITH B, BOOTH JAMES R, RICHEY JOHN P, BERRY JOHN B
Format:	Patent
Sprache:	eng
Schlagworte:	AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY TRANSMISSION
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