System for improving low voltage CMOS performance

A system for increasing the speed and noise immunity of signals transmitted in low voltage CMOS applications. The system includes a transmission device for transmitting a signal in a CMOS circuit, wherein the CMOS circuit includes a high voltage power supply and a low voltage power supply and the signal is transmitted between first and second portions of the CMOS circuit that are coupled to the low voltage power supply. The transmission device comprises a transistor having a gate, drain and source terminals, wherein the drain terminal is coupled to the first portion of the CMOS circuit to receive the signal, and the source terminal is coupled to the second portion of the CMOS circuit and a gate controller coupled to the high voltage power supply and providing a gate control signal coupled to the gate terminal, wherein the gate controller may provide a level approximately equal to the high voltage power supply to the gate terminal via the gate control signal, so that the transistor connects the drain and source terminals.