System for data and interrupt posting for computer devices
A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands...
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creator | SHEIKH TAHIR Q WALLACH WALTER A |
description | A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved. |
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The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2001</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20011002&DB=EPODOC&CC=US&NR=6298409B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20011002&DB=EPODOC&CC=US&NR=6298409B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SHEIKH TAHIR Q</creatorcontrib><creatorcontrib>WALLACH WALTER A</creatorcontrib><title>System for data and interrupt posting for computer devices</title><description>A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2001</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLAKriwuSc1VSMsvUkhJLElUSMxLUcjMK0ktKiotKFEoyC8uycxLB0sn5-cWlAIlFFJSyzKTU4t5GFjTEnOKU3mhNDeDgptriLOHbmpBfnxqcUFicmpeakl8aLCZkaWFiYGlk6ExEUoAN-AvIA</recordid><startdate>20011002</startdate><enddate>20011002</enddate><creator>SHEIKH TAHIR Q</creator><creator>WALLACH WALTER A</creator><scope>EVB</scope></search><sort><creationdate>20011002</creationdate><title>System for data and interrupt posting for computer devices</title><author>SHEIKH TAHIR Q ; WALLACH WALTER A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6298409B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2001</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>SHEIKH TAHIR Q</creatorcontrib><creatorcontrib>WALLACH WALTER A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SHEIKH TAHIR Q</au><au>WALLACH WALTER A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>System for data and interrupt posting for computer devices</title><date>2001-10-02</date><risdate>2001</risdate><abstract>A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
title | System for data and interrupt posting for computer devices |
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