Method for design optimization using logical and physical information
A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing plac...
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| creator | MALIK SHARAD RAJE SALIL R YEAP GARY K CHAKRABORTY ABHIJEET TARAPOREVALA FEROZE PESHOTAN TUNCER EMRE SARRAFZADEH MAJID PILEGGI LAWRENCE SHIEH LILLY KOFORD JAMES S GAITONDE DINESH BOYLE DOUGLAS B LI ARCHIE YAMAMOTO DENNIS GLUSS DAVID LI YAU-TSUN STEVEN KIM SAM JUNG SHORTT ROBERT EUGENE RAHMEH JOSEPH T GAO TONG DUNN CHRISTOPHER MCCAUGHRIN ERIC PULLELA SATAMURTHY |
| description | A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6286128B1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6286128B1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6286128B13</originalsourceid><addsrcrecordid>eNrjZHD1TS3JyE9RSMsvUkhJLc5Mz1PILyjJzM2sSizJzM9TKC3OzEtXyMlPz0xOzFFIzEtRKMioLAZzMvOAmnLByngYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosJmRhZmhkYWToTERSgDITDN-</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for design optimization using logical and physical information</title><source>esp@cenet</source><creator>MALIK SHARAD ; RAJE SALIL R ; YEAP GARY K ; CHAKRABORTY ABHIJEET ; TARAPOREVALA FEROZE PESHOTAN ; TUNCER EMRE ; SARRAFZADEH MAJID ; PILEGGI LAWRENCE ; SHIEH LILLY ; KOFORD JAMES S ; GAITONDE DINESH ; BOYLE DOUGLAS B ; LI ARCHIE ; YAMAMOTO DENNIS ; GLUSS DAVID ; LI YAU-TSUN STEVEN ; KIM SAM JUNG ; SHORTT ROBERT EUGENE ; RAHMEH JOSEPH T ; GAO TONG ; DUNN CHRISTOPHER ; MCCAUGHRIN ERIC ; PULLELA SATAMURTHY</creator><creatorcontrib>MALIK SHARAD ; RAJE SALIL R ; YEAP GARY K ; CHAKRABORTY ABHIJEET ; TARAPOREVALA FEROZE PESHOTAN ; TUNCER EMRE ; SARRAFZADEH MAJID ; PILEGGI LAWRENCE ; SHIEH LILLY ; KOFORD JAMES S ; GAITONDE DINESH ; BOYLE DOUGLAS B ; LI ARCHIE ; YAMAMOTO DENNIS ; GLUSS DAVID ; LI YAU-TSUN STEVEN ; KIM SAM JUNG ; SHORTT ROBERT EUGENE ; RAHMEH JOSEPH T ; GAO TONG ; DUNN CHRISTOPHER ; MCCAUGHRIN ERIC ; PULLELA SATAMURTHY</creatorcontrib><description>A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2001</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20010904&DB=EPODOC&CC=US&NR=6286128B1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20010904&DB=EPODOC&CC=US&NR=6286128B1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MALIK SHARAD</creatorcontrib><creatorcontrib>RAJE SALIL R</creatorcontrib><creatorcontrib>YEAP GARY K</creatorcontrib><creatorcontrib>CHAKRABORTY ABHIJEET</creatorcontrib><creatorcontrib>TARAPOREVALA FEROZE PESHOTAN</creatorcontrib><creatorcontrib>TUNCER EMRE</creatorcontrib><creatorcontrib>SARRAFZADEH MAJID</creatorcontrib><creatorcontrib>PILEGGI LAWRENCE</creatorcontrib><creatorcontrib>SHIEH LILLY</creatorcontrib><creatorcontrib>KOFORD JAMES S</creatorcontrib><creatorcontrib>GAITONDE DINESH</creatorcontrib><creatorcontrib>BOYLE DOUGLAS B</creatorcontrib><creatorcontrib>LI ARCHIE</creatorcontrib><creatorcontrib>YAMAMOTO DENNIS</creatorcontrib><creatorcontrib>GLUSS DAVID</creatorcontrib><creatorcontrib>LI YAU-TSUN STEVEN</creatorcontrib><creatorcontrib>KIM SAM JUNG</creatorcontrib><creatorcontrib>SHORTT ROBERT EUGENE</creatorcontrib><creatorcontrib>RAHMEH JOSEPH T</creatorcontrib><creatorcontrib>GAO TONG</creatorcontrib><creatorcontrib>DUNN CHRISTOPHER</creatorcontrib><creatorcontrib>MCCAUGHRIN ERIC</creatorcontrib><creatorcontrib>PULLELA SATAMURTHY</creatorcontrib><title>Method for design optimization using logical and physical information</title><description>A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2001</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHD1TS3JyE9RSMsvUkhJLc5Mz1PILyjJzM2sSizJzM9TKC3OzEtXyMlPz0xOzFFIzEtRKMioLAZzMvOAmnLByngYWNMSc4pTeaE0N4OCm2uIs4duakF-fGpxQWJyal5qSXxosJmRhZmhkYWToTERSgDITDN-</recordid><startdate>20010904</startdate><enddate>20010904</enddate><creator>MALIK SHARAD</creator><creator>RAJE SALIL R</creator><creator>YEAP GARY K</creator><creator>CHAKRABORTY ABHIJEET</creator><creator>TARAPOREVALA FEROZE PESHOTAN</creator><creator>TUNCER EMRE</creator><creator>SARRAFZADEH MAJID</creator><creator>PILEGGI LAWRENCE</creator><creator>SHIEH LILLY</creator><creator>KOFORD JAMES S</creator><creator>GAITONDE DINESH</creator><creator>BOYLE DOUGLAS B</creator><creator>LI ARCHIE</creator><creator>YAMAMOTO DENNIS</creator><creator>GLUSS DAVID</creator><creator>LI YAU-TSUN STEVEN</creator><creator>KIM SAM JUNG</creator><creator>SHORTT ROBERT EUGENE</creator><creator>RAHMEH JOSEPH T</creator><creator>GAO TONG</creator><creator>DUNN CHRISTOPHER</creator><creator>MCCAUGHRIN ERIC</creator><creator>PULLELA SATAMURTHY</creator><scope>EVB</scope></search><sort><creationdate>20010904</creationdate><title>Method for design optimization using logical and physical information</title><author>MALIK SHARAD ; RAJE SALIL R ; YEAP GARY K ; CHAKRABORTY ABHIJEET ; TARAPOREVALA FEROZE PESHOTAN ; TUNCER EMRE ; SARRAFZADEH MAJID ; PILEGGI LAWRENCE ; SHIEH LILLY ; KOFORD JAMES S ; GAITONDE DINESH ; BOYLE DOUGLAS B ; LI ARCHIE ; YAMAMOTO DENNIS ; GLUSS DAVID ; LI YAU-TSUN STEVEN ; KIM SAM JUNG ; SHORTT ROBERT EUGENE ; RAHMEH JOSEPH T ; GAO TONG ; DUNN CHRISTOPHER ; MCCAUGHRIN ERIC ; PULLELA SATAMURTHY</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6286128B13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2001</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>MALIK SHARAD</creatorcontrib><creatorcontrib>RAJE SALIL R</creatorcontrib><creatorcontrib>YEAP GARY K</creatorcontrib><creatorcontrib>CHAKRABORTY ABHIJEET</creatorcontrib><creatorcontrib>TARAPOREVALA FEROZE PESHOTAN</creatorcontrib><creatorcontrib>TUNCER EMRE</creatorcontrib><creatorcontrib>SARRAFZADEH MAJID</creatorcontrib><creatorcontrib>PILEGGI LAWRENCE</creatorcontrib><creatorcontrib>SHIEH LILLY</creatorcontrib><creatorcontrib>KOFORD JAMES S</creatorcontrib><creatorcontrib>GAITONDE DINESH</creatorcontrib><creatorcontrib>BOYLE DOUGLAS B</creatorcontrib><creatorcontrib>LI ARCHIE</creatorcontrib><creatorcontrib>YAMAMOTO DENNIS</creatorcontrib><creatorcontrib>GLUSS DAVID</creatorcontrib><creatorcontrib>LI YAU-TSUN STEVEN</creatorcontrib><creatorcontrib>KIM SAM JUNG</creatorcontrib><creatorcontrib>SHORTT ROBERT EUGENE</creatorcontrib><creatorcontrib>RAHMEH JOSEPH T</creatorcontrib><creatorcontrib>GAO TONG</creatorcontrib><creatorcontrib>DUNN CHRISTOPHER</creatorcontrib><creatorcontrib>MCCAUGHRIN ERIC</creatorcontrib><creatorcontrib>PULLELA SATAMURTHY</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MALIK SHARAD</au><au>RAJE SALIL R</au><au>YEAP GARY K</au><au>CHAKRABORTY ABHIJEET</au><au>TARAPOREVALA FEROZE PESHOTAN</au><au>TUNCER EMRE</au><au>SARRAFZADEH MAJID</au><au>PILEGGI LAWRENCE</au><au>SHIEH LILLY</au><au>KOFORD JAMES S</au><au>GAITONDE DINESH</au><au>BOYLE DOUGLAS B</au><au>LI ARCHIE</au><au>YAMAMOTO DENNIS</au><au>GLUSS DAVID</au><au>LI YAU-TSUN STEVEN</au><au>KIM SAM JUNG</au><au>SHORTT ROBERT EUGENE</au><au>RAHMEH JOSEPH T</au><au>GAO TONG</au><au>DUNN CHRISTOPHER</au><au>MCCAUGHRIN ERIC</au><au>PULLELA SATAMURTHY</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for design optimization using logical and physical information</title><date>2001-09-04</date><risdate>2001</risdate><abstract>A method for design optimization using logical and physical information is provided. In one embodiment, a method for design optimization using logical and physical information, includes receiving a behavioral description of an integrated circuit or a portion of an integrated circuit, optimizing placement of circuit elements in accordance with a first cost function, and optimizing logic of the circuit elements in accordance with a second cost function, in which the optimizing placement of the circuit elements and the optimizing logic of the circuit elements are performed concurrently. The method can further include optimizing routing in accordance with a third cost function, in which the optimizing routing, the optimizing placement of the circuit elements, and the optimizing logic of the circuit elements are performed concurrently.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
| title | Method for design optimization using logical and physical information |
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