High performance pipelined data path for a media processor

A pipelined data path architecture for use, in one embodiment, in a multimedia processor. The data path architecture requires a maximum of two execution pipestages to perform all instructions including wide data format multiply instructions and specially adapted multimedia instructions, such as the...

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Bibliographische Detailangaben
Hauptverfasser: OKLOBDZIJA VOJIN G, CHEHRAZI FARZAD
Format: Patent
Sprache:eng
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