Circuit and method for testing whether a programmable logic device complies with a zero-hold-time requirement

Described are a system and method for quickly and accurately testing sequential storage elements on programmable logic devices for zero-hold-time compliance. A programmable logic device is configured such that both the data and clock terminals of a selected sequential logic element connect to an inp...

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Bibliographische Detailangaben
1. Verfasser: MATERA MICHAEL M
Format: Patent
Sprache:eng
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