Clock supply system

In each low-rate interface 1, a clock/frame pulse signal 16 is separated from a signal 11 outputted from a high-rate interface and coupled through a phase controller 6 for clock substitution in a clock substituting circuit 5. The phase controller 6 sets a phase delay as a result of design when makin...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KUROSAWA, KATSUHIKO
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY MULTIPLEX COMMUNICATION TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
Online-Zugang:	Volltext bestellen
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