Transconductance control circuit for rail-to-rail (RTR) differential input terminal

A transconductance control circuit includes a differential input terminal wherein first and second differential MOS transistor pairs are parallel connected, a first current source connected between a supply voltage terminal and respective sources of the first differential MOS transistor pair and for providing a first bias current, and a second current source connected between a source of the second differential MOS transistor pair and ground, and for providing a second bias current. The circuit further includes a current detector for detecting respective bias currents of the first and second current sources and the current detector includes one DC path which leads from Vdd to Vss. The circuit decreases a transconductance variation by varying an operational voltage of a differential MOS transistor pair at an RTR differential input terminal and decreases power consumption while decreasing chip size.