Processor performance counter for sampling the execution frequency of individual instructions

Processor performance counter for sampling the execution frequency of individual instructions

A processor includes an execution pipeline and a retire unit coupled to an end of the execution pipeline. The processor executes instructions of a program. An apparatus for collecting performance data while the instructions are executing includes a register coupled to the retire unit of the processo...

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Hauptverfasser: BERC, LANCE M, WEIHL, WILLIAM E, LEUNG, SHUN-TAK ALBERT, VANDEVOORDE, MARK T
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator BERC
LANCE M
WEIHL
WILLIAM E
LEUNG
SHUN-TAK ALBERT
VANDEVOORDE
MARK T
description A processor includes an execution pipeline and a retire unit coupled to an end of the execution pipeline. The processor executes instructions of a program. An apparatus for collecting performance data while the instructions are executing includes a register coupled to the retire unit of the processor. Means are provided for incrementing the register whenever an instruction is retired from the execution pipeline. In addition, the apparatus includes means for generating an interrupt to an interrupt handler whenever the register is incremented to a predetermined value.
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Processor performance counter for sampling the execution frequency of individual instructions
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