Method and system for selective DRAM refresh to reduce power consumption

A method and system for selective refresh for a memory array is disclosed. The method and system comprises providing a plurality of valid bits, each of the valid bits being associated with a row of the memory device; and detecting when data access is performed within a row of the device. The method...

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Bibliographische Detailangaben
Hauptverfasser: SONG, SEUNGYOON PETER
Format: Patent
Sprache:eng
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