Memory control unit using a programmable shift register for generating timed control signals

A programmable memory controller is described. The memory control signals and timings are defined by programmable means. A plurality of shift registers are loaded with programmed values at the start of a control sequence. The programmed values are synchronously shifted with the optimum value system...

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Bibliographische Detailangaben

Hauptverfasser:	BOLYN, PHILIP C
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING INFORMATION STORAGE PHYSICS STATIC STORES
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