Method for making recessed field oxide for radiation hardened microelectronics
A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride lay...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | KERWIN DAVID B CHAFFEE JOHN T WOODRUFF RICHARD L |
description | A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride layer over the polysilicon layer; patterning the silicon nitride and polysilicon layers and etching away both layers where the field oxide is to be located; forming a field oxide by thermally oxidizing the substrate in the openings previously formed in the silicon nitride and polysilicon layers; etching away the thermal field oxide; thermally oxidizing the substrate in the etched-away field oxide areas; etching away the silicon nitride layer; optionally, implanting through the thermal oxide with an impurity; depositing a doped oxide; densifying the oxide in a steam ambient; etching back the deposited oxide; then either depositing an undoped CVD oxide, coating the oxide with a leveling layer to planarize the oxide surface, etching both the undoped CVD oxide and leveling layers and etching away the polysilicon; or etching away the polysilicon, leaching the dopants out of the surface of the field oxide structure and passivating the surface in a dry oxygen ambient. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6063690A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6063690A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6063690A3</originalsourceid><addsrcrecordid>eNrjZPDzTS3JyE9RSMsvUshNzM7MS1coSk1OLS5OBYplpuakKORXZKakguWLElMyE0sy8_MUMhKLUlLzgEpyM5OL8lNzUpNLivLzMpOLeRhY0xJzilN5oTQ3g7yba4izh25qQX58anFBYjJQW0l8aLCZgZmxmaWBozFhFQBWmjY3</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method for making recessed field oxide for radiation hardened microelectronics</title><source>esp@cenet</source><creator>KERWIN; DAVID B ; CHAFFEE; JOHN T ; WOODRUFF; RICHARD L</creator><creatorcontrib>KERWIN; DAVID B ; CHAFFEE; JOHN T ; WOODRUFF; RICHARD L</creatorcontrib><description>A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride layer over the polysilicon layer; patterning the silicon nitride and polysilicon layers and etching away both layers where the field oxide is to be located; forming a field oxide by thermally oxidizing the substrate in the openings previously formed in the silicon nitride and polysilicon layers; etching away the thermal field oxide; thermally oxidizing the substrate in the etched-away field oxide areas; etching away the silicon nitride layer; optionally, implanting through the thermal oxide with an impurity; depositing a doped oxide; densifying the oxide in a steam ambient; etching back the deposited oxide; then either depositing an undoped CVD oxide, coating the oxide with a leveling layer to planarize the oxide surface, etching both the undoped CVD oxide and leveling layers and etching away the polysilicon; or etching away the polysilicon, leaching the dopants out of the surface of the field oxide structure and passivating the surface in a dry oxygen ambient.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000516&DB=EPODOC&CC=US&NR=6063690A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76290</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000516&DB=EPODOC&CC=US&NR=6063690A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>KERWIN; DAVID B</creatorcontrib><creatorcontrib>CHAFFEE; JOHN T</creatorcontrib><creatorcontrib>WOODRUFF; RICHARD L</creatorcontrib><title>Method for making recessed field oxide for radiation hardened microelectronics</title><description>A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride layer over the polysilicon layer; patterning the silicon nitride and polysilicon layers and etching away both layers where the field oxide is to be located; forming a field oxide by thermally oxidizing the substrate in the openings previously formed in the silicon nitride and polysilicon layers; etching away the thermal field oxide; thermally oxidizing the substrate in the etched-away field oxide areas; etching away the silicon nitride layer; optionally, implanting through the thermal oxide with an impurity; depositing a doped oxide; densifying the oxide in a steam ambient; etching back the deposited oxide; then either depositing an undoped CVD oxide, coating the oxide with a leveling layer to planarize the oxide surface, etching both the undoped CVD oxide and leveling layers and etching away the polysilicon; or etching away the polysilicon, leaching the dopants out of the surface of the field oxide structure and passivating the surface in a dry oxygen ambient.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPDzTS3JyE9RSMsvUshNzM7MS1coSk1OLS5OBYplpuakKORXZKakguWLElMyE0sy8_MUMhKLUlLzgEpyM5OL8lNzUpNLivLzMpOLeRhY0xJzilN5oTQ3g7yba4izh25qQX58anFBYjJQW0l8aLCZgZmxmaWBozFhFQBWmjY3</recordid><startdate>20000516</startdate><enddate>20000516</enddate><creator>KERWIN; DAVID B</creator><creator>CHAFFEE; JOHN T</creator><creator>WOODRUFF; RICHARD L</creator><scope>EVB</scope></search><sort><creationdate>20000516</creationdate><title>Method for making recessed field oxide for radiation hardened microelectronics</title><author>KERWIN; DAVID B ; CHAFFEE; JOHN T ; WOODRUFF; RICHARD L</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6063690A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>KERWIN; DAVID B</creatorcontrib><creatorcontrib>CHAFFEE; JOHN T</creatorcontrib><creatorcontrib>WOODRUFF; RICHARD L</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>KERWIN; DAVID B</au><au>CHAFFEE; JOHN T</au><au>WOODRUFF; RICHARD L</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method for making recessed field oxide for radiation hardened microelectronics</title><date>2000-05-16</date><risdate>2000</risdate><abstract>A method of forming a recessed electrically-insulating field oxide region in a semiconductor substrate is disclosed. In a preferred embodiment, the method includes the steps of oxidizing a surface of the substrate; depositing a polysilicon layer over the oxide layer; depositing a silicon nitride layer over the polysilicon layer; patterning the silicon nitride and polysilicon layers and etching away both layers where the field oxide is to be located; forming a field oxide by thermally oxidizing the substrate in the openings previously formed in the silicon nitride and polysilicon layers; etching away the thermal field oxide; thermally oxidizing the substrate in the etched-away field oxide areas; etching away the silicon nitride layer; optionally, implanting through the thermal oxide with an impurity; depositing a doped oxide; densifying the oxide in a steam ambient; etching back the deposited oxide; then either depositing an undoped CVD oxide, coating the oxide with a leveling layer to planarize the oxide surface, etching both the undoped CVD oxide and leveling layers and etching away the polysilicon; or etching away the polysilicon, leaching the dopants out of the surface of the field oxide structure and passivating the surface in a dry oxygen ambient.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US6063690A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Method for making recessed field oxide for radiation hardened microelectronics |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-29T08%3A12%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=KERWIN;%20DAVID%20B&rft.date=2000-05-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6063690A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |