Performance monitoring of thread switch events in a multithreaded processor

Performance monitoring of thread switch events in a multithreaded processor

A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buff...

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Hauptverfasser: FLYNN, WILLIAM THOMAS, RANDOLPH, JACK CHRIS, LARSEN, TROY DALE
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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creator FLYNN
WILLIAM THOMAS
RANDOLPH
JACK CHRIS
LARSEN
TROY DALE
description A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6052708A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6052708A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6052708A3</originalsourceid><addsrcrecordid>eNrjZPAOSC1Kyy_KTcxLTlXIzc_LLMkvysxLV8hPUyjJKEpNTFEoLs8sSc5QSC1LzSspVsjMU0hUyC3NKcmESKemKBQU5SenFhfnF_EwsKYl5hSn8kJpbgZ5N9cQZw_d1IL8-NTigsTk1LzUkvjQYDMDUyNzAwtHY8IqANluNWQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Performance monitoring of thread switch events in a multithreaded processor</title><source>esp@cenet</source><creator>FLYNN; WILLIAM THOMAS ; RANDOLPH; JACK CHRIS ; LARSEN; TROY DALE</creator><creatorcontrib>FLYNN; WILLIAM THOMAS ; RANDOLPH; JACK CHRIS ; LARSEN; TROY DALE</creatorcontrib><description>A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.</description><edition>7</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20000418&amp;DB=EPODOC&amp;CC=US&amp;NR=6052708A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20000418&amp;DB=EPODOC&amp;CC=US&amp;NR=6052708A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>FLYNN; WILLIAM THOMAS</creatorcontrib><creatorcontrib>RANDOLPH; JACK CHRIS</creatorcontrib><creatorcontrib>LARSEN; TROY DALE</creatorcontrib><title>Performance monitoring of thread switch events in a multithreaded processor</title><description>A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAOSC1Kyy_KTcxLTlXIzc_LLMkvysxLV8hPUyjJKEpNTFEoLs8sSc5QSC1LzSspVsjMU0hUyC3NKcmESKemKBQU5SenFhfnF_EwsKYl5hSn8kJpbgZ5N9cQZw_d1IL8-NTigsTk1LzUkvjQYDMDUyNzAwtHY8IqANluNWQ</recordid><startdate>20000418</startdate><enddate>20000418</enddate><creator>FLYNN; WILLIAM THOMAS</creator><creator>RANDOLPH; JACK CHRIS</creator><creator>LARSEN; TROY DALE</creator><scope>EVB</scope></search><sort><creationdate>20000418</creationdate><title>Performance monitoring of thread switch events in a multithreaded processor</title><author>FLYNN; WILLIAM THOMAS ; RANDOLPH; JACK CHRIS ; LARSEN; TROY DALE</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6052708A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>FLYNN; WILLIAM THOMAS</creatorcontrib><creatorcontrib>RANDOLPH; JACK CHRIS</creatorcontrib><creatorcontrib>LARSEN; TROY DALE</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>FLYNN; WILLIAM THOMAS</au><au>RANDOLPH; JACK CHRIS</au><au>LARSEN; TROY DALE</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Performance monitoring of thread switch events in a multithreaded processor</title><date>2000-04-18</date><risdate>2000</risdate><abstract>A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record>
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subjects CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
title Performance monitoring of thread switch events in a multithreaded processor
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T07%3A36%3A25IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=FLYNN;%20WILLIAM%20THOMAS&rft.date=2000-04-18&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6052708A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true