Method and circuit for performing a shift arithmetic right operation

A method and circuit for performing a shift arithmetic right operation as disclosed. The circuit employs and the method uses an inverter which is configured to receive a sign bit of a first n bit operand which is subject to a shift arithmetic right instruction. The inverter is configured to generate a one bit operand representing a logical inversion of the sign bit of the first n bit operand. A shifter is also provided to receive the first n bit operand. The shifter shifts the first n bit operand according to a shift count c provided by the shift arithmetic right instruction. The shifter generates a second n bit operand which represents the first n bit operand shifted by c bit. A sign fill circuit is provided to receive the one bit operand from the inverter and the second n bit operand from the shifter. The sign fill circuit generates a result operand having n bits from the one bit operand in the second n operand. The result operand represents the first operand shifted by c bits and sign filled.