Pull-up and pull-down circuits

Pull-up and pull-down circuits

According to the preferred embodiment of the present invention pull-up/pull-down circuits are provided that use transistors with different threshold voltages to assure power-up to the correct predetermined state. These circuits have the ability to hold a node up or down while drawing very little DC...

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Hauptverfasser: GERSBACH, JOHN EDWIN
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
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creator GERSBACH
JOHN EDWIN
description According to the preferred embodiment of the present invention pull-up/pull-down circuits are provided that use transistors with different threshold voltages to assure power-up to the correct predetermined state. These circuits have the ability to hold a node up or down while drawing very little DC current. In one embodiment a pull-up/pull-down circuit is provided that powers up to a first state with the pull-up node high and the pull-down node low, and that can be toggled from one state to another. A second embodiment provides a pull-up or pull-down circuit that powers up to the desired state and can be disabled by pulling the pull-up node low or pulling the pull-down node high. The circuits remain disabled until the power to the circuit is cycled.
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These circuits have the ability to hold a node up or down while drawing very little DC current. In one embodiment a pull-up/pull-down circuit is provided that powers up to a first state with the pull-up node high and the pull-down node low, and that can be toggled from one state to another. A second embodiment provides a pull-up or pull-down circuit that powers up to the desired state and can be disabled by pulling the pull-up node low or pulling the pull-down node high. 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subjects BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
PULSE TECHNIQUE
title Pull-up and pull-down circuits
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