Electrically programmable anti-fuse circuit
An array of anti-fuse cells forming rows and columns of a matrix is described. The anti-fuse cell includes an MOS capacitor connected to a source of high voltage which is capable of rendering the capacitor permanently conductive. A first voltage limiting transistor connects the free end of the MOS c...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | BRACCHITTA JOHN A PRICER WILBUR D |
description | An array of anti-fuse cells forming rows and columns of a matrix is described. The anti-fuse cell includes an MOS capacitor connected to a source of high voltage which is capable of rendering the capacitor permanently conductive. A first voltage limiting transistor connects the free end of the MOS capacitor to a second transistor. An address decoder provides address signals to a source and gate of the second transistor within the cell. The MOS capacitor is rendered permanently conductive when the first and second transistors are rendered conductive. The high voltage is confined to the MOS capacitor, which is fused through the high current being drawn through the capacitor by the first and second transistors. Other components on the integrated circuit carrying the array of fusible cells are maintained free of any high voltage. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US6020777A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US6020777A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US6020777A3</originalsourceid><addsrcrecordid>eNrjZNB2zUlNLinKTE7MyalUKCjKTy9KzM1NTMpJVUjMK8nUTSstTlVIzixKLs0s4WFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8aHBZgZGBubm5o7GhFUAAPLSKSs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Electrically programmable anti-fuse circuit</title><source>esp@cenet</source><creator>BRACCHITTA; JOHN A ; PRICER; WILBUR D</creator><creatorcontrib>BRACCHITTA; JOHN A ; PRICER; WILBUR D</creatorcontrib><description>An array of anti-fuse cells forming rows and columns of a matrix is described. The anti-fuse cell includes an MOS capacitor connected to a source of high voltage which is capable of rendering the capacitor permanently conductive. A first voltage limiting transistor connects the free end of the MOS capacitor to a second transistor. An address decoder provides address signals to a source and gate of the second transistor within the cell. The MOS capacitor is rendered permanently conductive when the first and second transistors are rendered conductive. The high voltage is confined to the MOS capacitor, which is fused through the high current being drawn through the capacitor by the first and second transistors. Other components on the integrated circuit carrying the array of fusible cells are maintained free of any high voltage.</description><edition>7</edition><language>eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000201&DB=EPODOC&CC=US&NR=6020777A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000201&DB=EPODOC&CC=US&NR=6020777A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BRACCHITTA; JOHN A</creatorcontrib><creatorcontrib>PRICER; WILBUR D</creatorcontrib><title>Electrically programmable anti-fuse circuit</title><description>An array of anti-fuse cells forming rows and columns of a matrix is described. The anti-fuse cell includes an MOS capacitor connected to a source of high voltage which is capable of rendering the capacitor permanently conductive. A first voltage limiting transistor connects the free end of the MOS capacitor to a second transistor. An address decoder provides address signals to a source and gate of the second transistor within the cell. The MOS capacitor is rendered permanently conductive when the first and second transistors are rendered conductive. The high voltage is confined to the MOS capacitor, which is fused through the high current being drawn through the capacitor by the first and second transistors. Other components on the integrated circuit carrying the array of fusible cells are maintained free of any high voltage.</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNB2zUlNLinKTE7MyalUKCjKTy9KzM1NTMpJVUjMK8nUTSstTlVIzixKLs0s4WFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8aHBZgZGBubm5o7GhFUAAPLSKSs</recordid><startdate>20000201</startdate><enddate>20000201</enddate><creator>BRACCHITTA; JOHN A</creator><creator>PRICER; WILBUR D</creator><scope>EVB</scope></search><sort><creationdate>20000201</creationdate><title>Electrically programmable anti-fuse circuit</title><author>BRACCHITTA; JOHN A ; PRICER; WILBUR D</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US6020777A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>BRACCHITTA; JOHN A</creatorcontrib><creatorcontrib>PRICER; WILBUR D</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BRACCHITTA; JOHN A</au><au>PRICER; WILBUR D</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Electrically programmable anti-fuse circuit</title><date>2000-02-01</date><risdate>2000</risdate><abstract>An array of anti-fuse cells forming rows and columns of a matrix is described. The anti-fuse cell includes an MOS capacitor connected to a source of high voltage which is capable of rendering the capacitor permanently conductive. A first voltage limiting transistor connects the free end of the MOS capacitor to a second transistor. An address decoder provides address signals to a source and gate of the second transistor within the cell. The MOS capacitor is rendered permanently conductive when the first and second transistors are rendered conductive. The high voltage is confined to the MOS capacitor, which is fused through the high current being drawn through the capacitor by the first and second transistors. Other components on the integrated circuit carrying the array of fusible cells are maintained free of any high voltage.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US6020777A |
source | esp@cenet |
subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
title | Electrically programmable anti-fuse circuit |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-22T14%3A10%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BRACCHITTA;%20JOHN%20A&rft.date=2000-02-01&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS6020777A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |