CMP wafer carrier for preferential polishing of a wafer
An apparatus for polishing a semiconductor wafer is provided which includes a wafer carrier having on its lower surface a non-uniform surface structure means to vary the force against a wafer during a polishing operation so that the polishing is enhanced and imparts a planar surface across the polis...
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creator | SMITH, JR. PAUL H MCKINNEY CHARLES A STURTEVANT DOUGLAS K TIERSCH MATTHEW T RICKARD, JR. TIMOTHY J LEBEL RICHARD J NADEAU ROCK DESORCIE DANIEL D |
description | An apparatus for polishing a semiconductor wafer is provided which includes a wafer carrier having on its lower surface a non-uniform surface structure means to vary the force against a wafer during a polishing operation so that the polishing is enhanced and imparts a planar surface across the polished wafer. Preferred non-uniform surface structure means include use of a wafer carrier having on its lower surface a backing film having a first central portion having a predetermined compressibility and a second peripheral portion having a different compressibility than the first portion. Another non-uniform surface structure means to vary the force against the wafer comprises a wafer carrier having on its lower surface a raised circumferential region around the periphery of the carrier. |
format | Patent |
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Preferred non-uniform surface structure means include use of a wafer carrier having on its lower surface a backing film having a first central portion having a predetermined compressibility and a second peripheral portion having a different compressibility than the first portion. Another non-uniform surface structure means to vary the force against the wafer comprises a wafer carrier having on its lower surface a raised circumferential region around the periphery of the carrier.</description><edition>6</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; DRESSING OR CONDITIONING OF ABRADING SURFACES ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS ; GRINDING ; MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING ; PERFORMING OPERATIONS ; POLISHING ; SEMICONDUCTOR DEVICES ; TRANSPORTING</subject><creationdate>1999</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990323&DB=EPODOC&CC=US&NR=5885135A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19990323&DB=EPODOC&CC=US&NR=5885135A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SMITH, JR.; PAUL H</creatorcontrib><creatorcontrib>MCKINNEY; CHARLES A</creatorcontrib><creatorcontrib>STURTEVANT; DOUGLAS K</creatorcontrib><creatorcontrib>TIERSCH; MATTHEW T</creatorcontrib><creatorcontrib>RICKARD, JR.; TIMOTHY J</creatorcontrib><creatorcontrib>LEBEL; RICHARD J</creatorcontrib><creatorcontrib>NADEAU; ROCK</creatorcontrib><creatorcontrib>DESORCIE; DANIEL D</creatorcontrib><title>CMP wafer carrier for preferential polishing of a wafer</title><description>An apparatus for polishing a semiconductor wafer is provided which includes a wafer carrier having on its lower surface a non-uniform surface structure means to vary the force against a wafer during a polishing operation so that the polishing is enhanced and imparts a planar surface across the polished wafer. Preferred non-uniform surface structure means include use of a wafer carrier having on its lower surface a backing film having a first central portion having a predetermined compressibility and a second peripheral portion having a different compressibility than the first portion. Another non-uniform surface structure means to vary the force against the wafer comprises a wafer carrier having on its lower surface a raised circumferential region around the periphery of the carrier.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>DRESSING OR CONDITIONING OF ABRADING SURFACES</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS</subject><subject>GRINDING</subject><subject>MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING</subject><subject>PERFORMING OPERATIONS</subject><subject>POLISHING</subject><subject>SEMICONDUCTOR DEVICES</subject><subject>TRANSPORTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1999</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDB39g1QKE9MSy1SSE4sKsoE0mn5RQoFRalAodS8kszEHIWC_JzM4ozMvHSF_DSFRIhqHgbWtMSc4lReKM3NIO_mGuLsoZtakB-fWlyQmJyal1oSHxpsamFhamhs6mhMWAUA5UIsyw</recordid><startdate>19990323</startdate><enddate>19990323</enddate><creator>SMITH, JR.; PAUL H</creator><creator>MCKINNEY; CHARLES A</creator><creator>STURTEVANT; DOUGLAS K</creator><creator>TIERSCH; MATTHEW T</creator><creator>RICKARD, JR.; TIMOTHY J</creator><creator>LEBEL; RICHARD J</creator><creator>NADEAU; ROCK</creator><creator>DESORCIE; DANIEL D</creator><scope>EVB</scope></search><sort><creationdate>19990323</creationdate><title>CMP wafer carrier for preferential polishing of a wafer</title><author>SMITH, JR.; PAUL H ; MCKINNEY; CHARLES A ; STURTEVANT; DOUGLAS K ; TIERSCH; MATTHEW T ; RICKARD, JR.; TIMOTHY J ; LEBEL; RICHARD J ; NADEAU; ROCK ; DESORCIE; DANIEL D</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5885135A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1999</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>DRESSING OR CONDITIONING OF ABRADING SURFACES</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS</topic><topic>GRINDING</topic><topic>MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING</topic><topic>PERFORMING OPERATIONS</topic><topic>POLISHING</topic><topic>SEMICONDUCTOR DEVICES</topic><topic>TRANSPORTING</topic><toplevel>online_resources</toplevel><creatorcontrib>SMITH, JR.; PAUL H</creatorcontrib><creatorcontrib>MCKINNEY; CHARLES A</creatorcontrib><creatorcontrib>STURTEVANT; DOUGLAS K</creatorcontrib><creatorcontrib>TIERSCH; MATTHEW T</creatorcontrib><creatorcontrib>RICKARD, JR.; TIMOTHY J</creatorcontrib><creatorcontrib>LEBEL; RICHARD J</creatorcontrib><creatorcontrib>NADEAU; ROCK</creatorcontrib><creatorcontrib>DESORCIE; DANIEL D</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SMITH, JR.; PAUL H</au><au>MCKINNEY; CHARLES A</au><au>STURTEVANT; DOUGLAS K</au><au>TIERSCH; MATTHEW T</au><au>RICKARD, JR.; TIMOTHY J</au><au>LEBEL; RICHARD J</au><au>NADEAU; ROCK</au><au>DESORCIE; DANIEL D</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>CMP wafer carrier for preferential polishing of a wafer</title><date>1999-03-23</date><risdate>1999</risdate><abstract>An apparatus for polishing a semiconductor wafer is provided which includes a wafer carrier having on its lower surface a non-uniform surface structure means to vary the force against a wafer during a polishing operation so that the polishing is enhanced and imparts a planar surface across the polished wafer. Preferred non-uniform surface structure means include use of a wafer carrier having on its lower surface a backing film having a first central portion having a predetermined compressibility and a second peripheral portion having a different compressibility than the first portion. Another non-uniform surface structure means to vary the force against the wafer comprises a wafer carrier having on its lower surface a raised circumferential region around the periphery of the carrier.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING PERFORMING OPERATIONS POLISHING SEMICONDUCTOR DEVICES TRANSPORTING |
title | CMP wafer carrier for preferential polishing of a wafer |
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