Power-up detector circuit

An integrated circuit includes a power-up detector circuit that includes a node that is held at a charged state by a capacitor during normal operation. The voltage on the node is sensed by a sensing circuit, typically an inverter that produces a power-up reset pulse when power is initially applied....

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: FREYMAN, RONALD LAMAR, HUNTER, MICHAEL JAMES
Format: Patent
Sprache:eng
Schlagworte:
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