Efficient ROM and PLA recoding to save chip area

DSP size and cost can be reduced by shrinking the program ROM and opcode interpreter (e.g., PLA) to store and recognize only #OC unique opcodes from within the total available opcodes for the DSP. The minimum opcode length M is the smallest integer satisfying 2M>/=#OC. It is preferred to choose a...

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Hauptverfasser:	HALAHMI, DROR
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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creator	HALAHMI DROR
description	DSP size and cost can be reduced by shrinking the program ROM and opcode interpreter (e.g., PLA) to store and recognize only #OC unique opcodes from within the total available opcodes for the DSP. The minimum opcode length M is the smallest integer satisfying 2M>/=#OC. It is preferred to choose an opcode length M'>M so that the total chip area occupied by the ROM plus PLA is minimized without loss of chip performance. By converting 24 bit opcodes to 16 bit opcodes for M=12 and M'=16, the combined program ROM and PLA areas are reduced by DIFFERENCE +E,fra 1/3+EE rd and the overall DSP is significantly smaller.
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The minimum opcode length M is the smallest integer satisfying 2M>/=#OC. It is preferred to choose an opcode length M'>M so that the total chip area occupied by the ROM plus PLA is minimized without loss of chip performance. By converting 24 bit opcodes to 16 bit opcodes for M=12 and M'=16, the combined program ROM and PLA areas are reduced by DIFFERENCE +E,fra 1/3+EE rd and the overall DSP is significantly smaller.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS</subject><creationdate>1998</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19980922&DB=EPODOC&CC=US&NR=5812856A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19980922&DB=EPODOC&CC=US&NR=5812856A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HALAHMI; DROR</creatorcontrib><title>Efficient ROM and PLA recoding to save chip area</title><description>DSP size and cost can be reduced by shrinking the program ROM and opcode interpreter (e.g., PLA) to store and recognize only #OC unique opcodes from within the total available opcodes for the DSP. The minimum opcode length M is the smallest integer satisfying 2M>/=#OC. It is preferred to choose an opcode length M'>M so that the total chip area occupied by the ROM plus PLA is minimized without loss of chip performance. By converting 24 bit opcodes to 16 bit opcodes for M=12 and M'=16, the combined program ROM and PLA areas are reduced by DIFFERENCE +E,fra 1/3+EE rd and the overall DSP is significantly smaller.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>PHYSICS</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1998</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDBwTUvLTM5MzStRCPL3VUjMS1EI8HFUKEpNzk_JzEtXKMlXKE4sS1VIzsgsUEgsSk3kYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxocGmFoZGFqZmjsaEVQAAFSspLA</recordid><startdate>19980922</startdate><enddate>19980922</enddate><creator>HALAHMI; DROR</creator><scope>EVB</scope></search><sort><creationdate>19980922</creationdate><title>Efficient ROM and PLA recoding to save chip area</title><author>HALAHMI; DROR</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5812856A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1998</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>PHYSICS</topic><toplevel>online_resources</toplevel><creatorcontrib>HALAHMI; DROR</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HALAHMI; DROR</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Efficient ROM and PLA recoding to save chip area</title><date>1998-09-22</date><risdate>1998</risdate><abstract>DSP size and cost can be reduced by shrinking the program ROM and opcode interpreter (e.g., PLA) to store and recognize only #OC unique opcodes from within the total available opcodes for the DSP. The minimum opcode length M is the smallest integer satisfying 2M>/=#OC. It is preferred to choose an opcode length M'>M so that the total chip area occupied by the ROM plus PLA is minimized without loss of chip performance. By converting 24 bit opcodes to 16 bit opcodes for M=12 and M'=16, the combined program ROM and PLA areas are reduced by DIFFERENCE +E,fra 1/3+EE rd and the overall DSP is significantly smaller.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record>
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subjects	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
title	Efficient ROM and PLA recoding to save chip area
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