CMOS process utilizing disposable silicon nitride spacers for making lightly doped drain

A process sequence for fabricating CMOS devices of the LDD type includes forming spacers along the sides of gates defined on p- and n-regions of the device. In a two-mask sequence, a thin layer of silicon dioxide is utilized to protect the n-region spacers while the p-region spacers are etched away....

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Hauptverfasser:	CHEN, TEH-YI JAMES
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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