Method and apparatus for implementing precise interrupts in a pipelined data processing system

An apparatus for producing in a superscalar pipelined system out-of-order execution and in-order completion of a set of macroinstructions, wherein the set of macroinstructions are translated into a set of microinstructions and the microinstructions are executed by the pipelined system and wherein at...

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Bibliographische Detailangaben

Hauptverfasser:	LIN, SHIH-YIN, HUANG, BING-HUANG, SHANG, SHI-SHENG, CHANG, CHING-TANG
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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