Method of fabricating a dynamic random access memory (DRAM) cell capacitor using hemispherical grain (HSG) polysilicon and selective polysilicon etchback

A storage node 64 of a capacitor having increased charge storage capacity and a method for forming thereof. A doped polysilicon region 68 is formed. A thin layer of hemispherical grain polysilicon 70 is deposited over the doped polysilicon region 68. The doped polysilicon region 68 and the thin laye...

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Hauptverfasser: CRENSHAW, DARIUS LAMMONT, WISE, RICK L, MCKEE, JEFFREY
Format: Patent
Sprache:eng
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