Frequency multiplier using XOR/NXOR gates which have equal propagation delays

The gates (11) of the exclusive OR type having two inputs (A, B) are disposed in tree structure in successive layers of an integrated circuit beginning with an input layer which receives the input signals of the tree. The output of each gate is connected to an input of a gate in the adjacent layer....

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Bibliographische Detailangaben
Hauptverfasser: MARBOT, ROLAND, COFLER, ANDREW, LE BIHAN, JEAN-CLAUDE, NEZAMZADEH-MOOSAVI, REZA
Format: Patent
Sprache:eng
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