Multiple execution unit dispatch with instruction shifting between first and second instruction buffers based upon data dependency

A multiple execution unit processing system is provided wherein each execution unit has an associated instruction buffer and all instruction are executed in order. The first execution unit (unit 0) will always contain the oldest instruction and the second unit (unit 1) the newest. Processor instruct...

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Bibliographische Detailangaben

Hauptverfasser:	RAY, DAVID S, THATCHER, LARRY E, WARREN, JR., HENRY S
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
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