Error free data transfers
A novel circuit is provided which allows a storage register to load data from another register utilizing a store signal which is asynchronous to the clock signal used to store data in the first register. A novel store circuit is provided which provides a control signal in response to a store signal,...
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| creator | GHADERI MIR B FOTOUHI BAHRAM |
| description | A novel circuit is provided which allows a storage register to load data from another register utilizing a store signal which is asynchronous to the clock signal used to store data in the first register. A novel store circuit is provided which provides a control signal in response to a store signal, which conditionally loads data into the storage register. The contents of the storage register is either maintained or overwritten, depending upon the relationship of the store signal to the clock signal. |
| format | Patent |
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A novel store circuit is provided which provides a control signal in response to a store signal, which conditionally loads data into the storage register. The contents of the storage register is either maintained or overwritten, depending upon the relationship of the store signal to the clock signal.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; PHYSICS ; TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><creationdate>1997</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970128&DB=EPODOC&CC=US&NR=5598552A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,777,882,25545,76296</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19970128&DB=EPODOC&CC=US&NR=5598552A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>GHADERI; MIR B</creatorcontrib><creatorcontrib>FOTOUHI; BAHRAM</creatorcontrib><title>Error free data transfers</title><description>A novel circuit is provided which allows a storage register to load data from another register utilizing a store signal which is asynchronous to the clock signal used to store data in the first register. A novel store circuit is provided which provides a control signal in response to a store signal, which conditionally loads data into the storage register. The contents of the storage register is either maintained or overwritten, depending upon the relationship of the store signal to the clock signal.</description><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>PHYSICS</subject><subject>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1997</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZJB0LSrKL1JIK0pNVUhJLElUKClKzCtOSy0q5mFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8aHBpqaWFqamRo7GhFUAAJLRIfY</recordid><startdate>19970128</startdate><enddate>19970128</enddate><creator>GHADERI; MIR B</creator><creator>FOTOUHI; BAHRAM</creator><scope>EVB</scope></search><sort><creationdate>19970128</creationdate><title>Error free data transfers</title><author>GHADERI; MIR B ; FOTOUHI; BAHRAM</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5598552A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1997</creationdate><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>PHYSICS</topic><topic>TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION</topic><toplevel>online_resources</toplevel><creatorcontrib>GHADERI; MIR B</creatorcontrib><creatorcontrib>FOTOUHI; BAHRAM</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>GHADERI; MIR B</au><au>FOTOUHI; BAHRAM</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Error free data transfers</title><date>1997-01-28</date><risdate>1997</risdate><abstract>A novel circuit is provided which allows a storage register to load data from another register utilizing a store signal which is asynchronous to the clock signal used to store data in the first register. A novel store circuit is provided which provides a control signal in response to a store signal, which conditionally loads data into the storage register. The contents of the storage register is either maintained or overwritten, depending upon the relationship of the store signal to the clock signal.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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| language | eng |
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| subjects | CALCULATING COMPUTING COUNTING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY PHYSICS TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION |
| title | Error free data transfers |
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