Lead-on chip semiconductor device having peripheral bond pads

A semiconductor device (10) has a lead-on-chip (LOC) configuration. Leads (24) of the device have central portions (36) which are electrically coupled to peripheral bond pads (14) by conductive wires (30). Inner portions (38) of the leads extend from the central portions toward centerline A-A for im...

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Bibliographische Detailangaben

Hauptverfasser:	BIGLER, CHARLES G, AFSHAR, DAVID D, CASTO, JAMES J, MCSHANE, MICHAEL B
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
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