Multiplexer
A multiplexer circuit which is built up from a series of smaller submultiplexers (241-247, 251-254). It selects a number of adjacent bits, bytes or words from one register and places them in the same order in a second register. The multiplexer can be used in cache memories or instruction buffers.
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| creator | TAST HANS-WERNER GETZLAFF KLAUS J PFLUEGER THOMAS |
| description | A multiplexer circuit which is built up from a series of smaller submultiplexers (241-247, 251-254). It selects a number of adjacent bits, bytes or words from one register and places them in the same order in a second register. The multiplexer can be used in cache memories or instruction buffers. |
| format | Patent |
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It selects a number of adjacent bits, bytes or words from one register and places them in the same order in a second register. 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It selects a number of adjacent bits, bytes or words from one register and places them in the same order in a second register. The multiplexer can be used in cache memories or instruction buffers.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>CODE CONVERSION IN GENERAL</subject><subject>CODING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>DECODING</subject><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>MULTIPLEX COMMUNICATION</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1994</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOD2Lc0pySzISa1ILeJhYE1LzClO5YXS3Azybq4hzh66qQX58anFBYnJqXmpJfGhwabGhoamhpaOxoRVAACRcRzp</recordid><startdate>19940510</startdate><enddate>19940510</enddate><creator>TAST; HANS-WERNER</creator><creator>GETZLAFF; KLAUS J</creator><creator>PFLUEGER; THOMAS</creator><scope>EVB</scope></search><sort><creationdate>19940510</creationdate><title>Multiplexer</title><author>TAST; HANS-WERNER ; GETZLAFF; KLAUS J ; PFLUEGER; THOMAS</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5311519A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1994</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>CODE CONVERSION IN GENERAL</topic><topic>CODING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>DECODING</topic><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>MULTIPLEX COMMUNICATION</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><toplevel>online_resources</toplevel><creatorcontrib>TAST; HANS-WERNER</creatorcontrib><creatorcontrib>GETZLAFF; KLAUS J</creatorcontrib><creatorcontrib>PFLUEGER; THOMAS</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>TAST; HANS-WERNER</au><au>GETZLAFF; KLAUS J</au><au>PFLUEGER; THOMAS</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multiplexer</title><date>1994-05-10</date><risdate>1994</risdate><abstract>A multiplexer circuit which is built up from a series of smaller submultiplexers (241-247, 251-254). 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| subjects | BASIC ELECTRONIC CIRCUITRY CALCULATING CODE CONVERSION IN GENERAL CODING COMPUTING COUNTING DECODING ELECTRIC COMMUNICATION TECHNIQUE ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY MULTIPLEX COMMUNICATION PHYSICS PULSE TECHNIQUE |
| title | Multiplexer |
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