Adapter and test fixture for an integrated circuit device package
A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head ass...
Gespeichert in:
Hauptverfasser: | , , , , , , , , , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | HERR WOLFGANG H CHAMBERS RICHARD G COMPTON PETER M TROBOUGH DOUGLAS W JANKO BOZIDAR COLE PAUL A |
description | A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US5202622A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US5202622A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US5202622A3</originalsourceid><addsrcrecordid>eNrjZHB0TEksKEktUkjMS1EoSS0uUUjLrCgpLUpVSMsHCSpk5pWkphcllqSmKCRnFiWXZpYopKSWZSanKhQkJmcnpqfyMLCmJeYUp_JCaW4GeTfXEGcP3dSC_PjUYqCq1LzUkvjQYFMjAyMzIyNHY8IqACoAML8</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Adapter and test fixture for an integrated circuit device package</title><source>esp@cenet</source><creator>HERR; WOLFGANG H ; CHAMBERS; RICHARD G ; COMPTON; PETER M ; TROBOUGH; DOUGLAS W ; JANKO; BOZIDAR ; COLE; PAUL A</creator><creatorcontrib>HERR; WOLFGANG H ; CHAMBERS; RICHARD G ; COMPTON; PETER M ; TROBOUGH; DOUGLAS W ; JANKO; BOZIDAR ; COLE; PAUL A</creatorcontrib><description>A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect.</description><language>eng</language><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PRINTED CIRCUITS ; TESTING</subject><creationdate>1993</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19930413&DB=EPODOC&CC=US&NR=5202622A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19930413&DB=EPODOC&CC=US&NR=5202622A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HERR; WOLFGANG H</creatorcontrib><creatorcontrib>CHAMBERS; RICHARD G</creatorcontrib><creatorcontrib>COMPTON; PETER M</creatorcontrib><creatorcontrib>TROBOUGH; DOUGLAS W</creatorcontrib><creatorcontrib>JANKO; BOZIDAR</creatorcontrib><creatorcontrib>COLE; PAUL A</creatorcontrib><title>Adapter and test fixture for an integrated circuit device package</title><description>A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect.</description><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PRINTED CIRCUITS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1993</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHB0TEksKEktUkjMS1EoSS0uUUjLrCgpLUpVSMsHCSpk5pWkphcllqSmKCRnFiWXZpYopKSWZSanKhQkJmcnpqfyMLCmJeYUp_JCaW4GeTfXEGcP3dSC_PjUYqCq1LzUkvjQYFMjAyMzIyNHY8IqACoAML8</recordid><startdate>19930413</startdate><enddate>19930413</enddate><creator>HERR; WOLFGANG H</creator><creator>CHAMBERS; RICHARD G</creator><creator>COMPTON; PETER M</creator><creator>TROBOUGH; DOUGLAS W</creator><creator>JANKO; BOZIDAR</creator><creator>COLE; PAUL A</creator><scope>EVB</scope></search><sort><creationdate>19930413</creationdate><title>Adapter and test fixture for an integrated circuit device package</title><author>HERR; WOLFGANG H ; CHAMBERS; RICHARD G ; COMPTON; PETER M ; TROBOUGH; DOUGLAS W ; JANKO; BOZIDAR ; COLE; PAUL A</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5202622A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1993</creationdate><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PRINTED CIRCUITS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>HERR; WOLFGANG H</creatorcontrib><creatorcontrib>CHAMBERS; RICHARD G</creatorcontrib><creatorcontrib>COMPTON; PETER M</creatorcontrib><creatorcontrib>TROBOUGH; DOUGLAS W</creatorcontrib><creatorcontrib>JANKO; BOZIDAR</creatorcontrib><creatorcontrib>COLE; PAUL A</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HERR; WOLFGANG H</au><au>CHAMBERS; RICHARD G</au><au>COMPTON; PETER M</au><au>TROBOUGH; DOUGLAS W</au><au>JANKO; BOZIDAR</au><au>COLE; PAUL A</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Adapter and test fixture for an integrated circuit device package</title><date>1993-04-13</date><risdate>1993</risdate><abstract>A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US5202622A |
source | esp@cenet |
subjects | CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PRINTED CIRCUITS TESTING |
title | Adapter and test fixture for an integrated circuit device package |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T01%3A01%3A58IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HERR;%20WOLFGANG%20H&rft.date=1993-04-13&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS5202622A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |