Method and apparatus for error detection and localization

A computer system reads data from selected locations in a memory while each address applied to the memory is temporarily stored in a register. If a data error is detected, two flipflops are set, one of which can generate and interrupt the central processing unit, and the other of which disables an AND gate through which a load signal is applied to the register in order to disable the register. An arrangement for resetting the second flipflop includes a third flipflop which is set and reset respectively at the beginning and end of each input/output cycle and which has an output coupled to one input of an AND gate having a further input to which is applied a signal selectively actuable by the central processing unit, the output of the AND gate and a system reset signal being applied to inputs of an OR gate which has its output connected to a reset input of the second flipflop.