Channelized delay and mix chip rate detector

A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limit...

Ausführliche Beschreibung

Gespeichert in:

Bibliographische Detailangaben
Hauptverfasser:	SMITH, PATRICK J, LEAHY, RONALD S
Format:	Patent
Sprache:	eng
Schlagworte:	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY JAMMING OF COMMUNICATION SECRET COMMUNICATION TRANSMISSION
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

container_end_page
container_issue
container_start_page
container_title
container_volume
creator	SMITH PATRICK J LEAHY RONALD S
description	A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limited product signals are totalized to give a resultant signal representative of the chip rate.
format	Patent
fullrecord	<record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US5063572A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US5063572A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US5063572A3</originalsourceid><addsrcrecordid>eNrjZNBxzkjMy0vNyaxKTVFISc1JrFRIzEtRyM2sUEjOyCxQKEosSQWKl6Qml-QX8TCwpiXmFKfyQmluBnk31xBnD93Ugvz41OKCxOTUvNSS-NBgUwMzY1NzI0djwioA1QQo1A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Channelized delay and mix chip rate detector</title><source>esp@cenet</source><creator>SMITH; PATRICK J ; LEAHY; RONALD S</creator><creatorcontrib>SMITH; PATRICK J ; LEAHY; RONALD S</creatorcontrib><description>A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limited product signals are totalized to give a resultant signal representative of the chip rate.</description><language>eng</language><subject>ELECTRIC COMMUNICATION TECHNIQUE ; ELECTRICITY ; JAMMING OF COMMUNICATION ; SECRET COMMUNICATION ; TRANSMISSION</subject><creationdate>1991</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19911105&DB=EPODOC&CC=US&NR=5063572A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19911105&DB=EPODOC&CC=US&NR=5063572A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SMITH; PATRICK J</creatorcontrib><creatorcontrib>LEAHY; RONALD S</creatorcontrib><title>Channelized delay and mix chip rate detector</title><description>A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limited product signals are totalized to give a resultant signal representative of the chip rate.</description><subject>ELECTRIC COMMUNICATION TECHNIQUE</subject><subject>ELECTRICITY</subject><subject>JAMMING OF COMMUNICATION</subject><subject>SECRET COMMUNICATION</subject><subject>TRANSMISSION</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1991</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNBxzkjMy0vNyaxKTVFISc1JrFRIzEtRyM2sUEjOyCxQKEosSQWKl6Qml-QX8TCwpiXmFKfyQmluBnk31xBnD93Ugvz41OKCxOTUvNSS-NBgUwMzY1NzI0djwioA1QQo1A</recordid><startdate>19911105</startdate><enddate>19911105</enddate><creator>SMITH; PATRICK J</creator><creator>LEAHY; RONALD S</creator><scope>EVB</scope></search><sort><creationdate>19911105</creationdate><title>Channelized delay and mix chip rate detector</title><author>SMITH; PATRICK J ; LEAHY; RONALD S</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US5063572A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1991</creationdate><topic>ELECTRIC COMMUNICATION TECHNIQUE</topic><topic>ELECTRICITY</topic><topic>JAMMING OF COMMUNICATION</topic><topic>SECRET COMMUNICATION</topic><topic>TRANSMISSION</topic><toplevel>online_resources</toplevel><creatorcontrib>SMITH; PATRICK J</creatorcontrib><creatorcontrib>LEAHY; RONALD S</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SMITH; PATRICK J</au><au>LEAHY; RONALD S</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Channelized delay and mix chip rate detector</title><date>1991-11-05</date><risdate>1991</risdate><abstract>A detector circuit for indicating the chip rate of a direct sequence frequency hopped data transmission signal. The wide band input signal is channelized into L adjacent sub-bands and each sub-band signal is multiplied by a delayed copy of itself and then hard limited, after which all the hard limited product signals are totalized to give a resultant signal representative of the chip rate.</abstract><oa>free_for_read</oa></addata></record>
fulltext	fulltext_linktorsrc
identifier
ispartof
issn
language	eng
recordid	cdi_epo_espacenet_US5063572A
source	esp@cenet
subjects	ELECTRIC COMMUNICATION TECHNIQUE ELECTRICITY JAMMING OF COMMUNICATION SECRET COMMUNICATION TRANSMISSION
title	Channelized delay and mix chip rate detector
url	https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T01%3A30%3A26IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SMITH;%20PATRICK%20J&rft.date=1991-11-05&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS5063572A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true