Fabrication of GaAs integrated circuits

A process for manufacturing selectively doped heterostructure field-effect transistors (SDHTs), a desired wafer structure for SDHT fabrication and a method for isolating SDHTs on the wafer are disclosed herein. The wafer has epitaxial layers grown on a substrate. The layers are: a buffer layer of Ga...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	LAHAV, ALEX, REYNOLDS, JR., CLAUDE L, VUONG, THI-HONG-HA, PEI, SHIN-SHEM, AHRENS, RICHARD E, BACA, ALBERT G, BURTON, RANDOLPH H, IANNUZZI, MICHAEL P
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!