Chip carrier

A chip carrier and a process of assembling a chip carrier are disclosed. The carrier used for mounting a chip comprises a copper or copper base alloy component having a thin refractory oxide layer on a surface thereof. The surface and the oxide layer have an indentation formed therein for receiving...

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Hauptverfasser: BUTT, SHELDON H
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SHELDON H
description A chip carrier and a process of assembling a chip carrier are disclosed. The carrier used for mounting a chip comprises a copper or copper base alloy component having a thin refractory oxide layer on a surface thereof. The surface and the oxide layer have an indentation formed therein for receiving the chip. A metallic circuit pattern for electrical connection to the chip is bonded to the oxide layer and insulated from the copper or copper base alloy by the refractory oxide layer. A seal is provided for enclosing the chip to the indentation. Another embodiment of the invention includes a circuit board structure comprising a circuit board device having a first coefficient of thermal expansion. A chip carrier is provided having a second coefficient thermal expansion of substantially the same value as the first coefficient of thermal expansion. The chip carrier has electrical leads soldered to the circuit board whereby thermal cycling of the circuit board structure does not substantially stress the bond between the solder, leads and circuit board.
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The surface and the oxide layer have an indentation formed therein for receiving the chip. A metallic circuit pattern for electrical connection to the chip is bonded to the oxide layer and insulated from the copper or copper base alloy by the refractory oxide layer. A seal is provided for enclosing the chip to the indentation. Another embodiment of the invention includes a circuit board structure comprising a circuit board device having a first coefficient of thermal expansion. A chip carrier is provided having a second coefficient thermal expansion of substantially the same value as the first coefficient of thermal expansion. The chip carrier has electrical leads soldered to the circuit board whereby thermal cycling of the circuit board structure does not substantially stress the bond between the solder, leads and circuit board.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1989</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19890801&amp;DB=EPODOC&amp;CC=US&amp;NR=4853491A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=19890801&amp;DB=EPODOC&amp;CC=US&amp;NR=4853491A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BUTT; SHELDON H</creatorcontrib><title>Chip carrier</title><description>A chip carrier and a process of assembling a chip carrier are disclosed. The carrier used for mounting a chip comprises a copper or copper base alloy component having a thin refractory oxide layer on a surface thereof. The surface and the oxide layer have an indentation formed therein for receiving the chip. A metallic circuit pattern for electrical connection to the chip is bonded to the oxide layer and insulated from the copper or copper base alloy by the refractory oxide layer. A seal is provided for enclosing the chip to the indentation. Another embodiment of the invention includes a circuit board structure comprising a circuit board device having a first coefficient of thermal expansion. A chip carrier is provided having a second coefficient thermal expansion of substantially the same value as the first coefficient of thermal expansion. The chip carrier has electrical leads soldered to the circuit board whereby thermal cycling of the circuit board structure does not substantially stress the bond between the solder, leads and circuit board.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1989</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZOBxzsgsUEhOLCrKTC3iYWBNS8wpTuWF0twM8m6uIc4euqkF-fGpxQWJyal5qSXxocEmFqbGJpaGjsaEVQAAj7sc7Q</recordid><startdate>19890801</startdate><enddate>19890801</enddate><creator>BUTT; SHELDON H</creator><scope>EVB</scope></search><sort><creationdate>19890801</creationdate><title>Chip carrier</title><author>BUTT; SHELDON H</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US4853491A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1989</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BUTT; SHELDON H</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BUTT; SHELDON H</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Chip carrier</title><date>1989-08-01</date><risdate>1989</risdate><abstract>A chip carrier and a process of assembling a chip carrier are disclosed. The carrier used for mounting a chip comprises a copper or copper base alloy component having a thin refractory oxide layer on a surface thereof. The surface and the oxide layer have an indentation formed therein for receiving the chip. A metallic circuit pattern for electrical connection to the chip is bonded to the oxide layer and insulated from the copper or copper base alloy by the refractory oxide layer. A seal is provided for enclosing the chip to the indentation. Another embodiment of the invention includes a circuit board structure comprising a circuit board device having a first coefficient of thermal expansion. A chip carrier is provided having a second coefficient thermal expansion of substantially the same value as the first coefficient of thermal expansion. The chip carrier has electrical leads soldered to the circuit board whereby thermal cycling of the circuit board structure does not substantially stress the bond between the solder, leads and circuit board.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Chip carrier
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