Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method
A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high vol...
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| creator | CHOW TAT-SING P BALIGA BANTVAL J CHANG HSUEH-RONG |
| description | A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end. |
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| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US4801986A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US4801986A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US4801986A3</originalsourceid><addsrcrecordid>eNqFjL0KwjAURrs4iPoM3hcQFEXaUfzBRRyqXcs1-WIvtElJUvXxreLudOBwvm-YNAV8FMU1adfdapAWY7oATQ1ib91LNCigEeWs7lR0nord6ZyTxkMU6CmxIrHKgz-rwAbkWniOYu_EvSa237fK6XEyMFwHTH4cJdPD_rI9ztC6EqFlBYtYXvNVOl9k6Xqz_F-8AVQ4QUg</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method</title><source>esp@cenet</source><creator>CHOW; TAT-SING P ; BALIGA; BANTVAL J ; CHANG; HSUEH-RONG</creator><creatorcontrib>CHOW; TAT-SING P ; BALIGA; BANTVAL J ; CHANG; HSUEH-RONG</creatorcontrib><description>A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end.</description><edition>4</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1989</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19890131&DB=EPODOC&CC=US&NR=4801986A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19890131&DB=EPODOC&CC=US&NR=4801986A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>CHOW; TAT-SING P</creatorcontrib><creatorcontrib>BALIGA; BANTVAL J</creatorcontrib><creatorcontrib>CHANG; HSUEH-RONG</creatorcontrib><title>Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method</title><description>A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1989</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFjL0KwjAURrs4iPoM3hcQFEXaUfzBRRyqXcs1-WIvtElJUvXxreLudOBwvm-YNAV8FMU1adfdapAWY7oATQ1ib91LNCigEeWs7lR0nord6ZyTxkMU6CmxIrHKgz-rwAbkWniOYu_EvSa237fK6XEyMFwHTH4cJdPD_rI9ztC6EqFlBYtYXvNVOl9k6Xqz_F-8AVQ4QUg</recordid><startdate>19890131</startdate><enddate>19890131</enddate><creator>CHOW; TAT-SING P</creator><creator>BALIGA; BANTVAL J</creator><creator>CHANG; HSUEH-RONG</creator><scope>EVB</scope></search><sort><creationdate>19890131</creationdate><title>Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method</title><author>CHOW; TAT-SING P ; BALIGA; BANTVAL J ; CHANG; HSUEH-RONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US4801986A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1989</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>CHOW; TAT-SING P</creatorcontrib><creatorcontrib>BALIGA; BANTVAL J</creatorcontrib><creatorcontrib>CHANG; HSUEH-RONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>CHOW; TAT-SING P</au><au>BALIGA; BANTVAL J</au><au>CHANG; HSUEH-RONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method</title><date>1989-01-31</date><risdate>1989</risdate><abstract>A power field effect device has a gate grid having a plurality of elongate openings therein through which a base region forming a high voltage blocking junction with the underlying body was diffused. The openings have round ends in order to prevent the formation of spherical portions in the high voltage blocking junction. The round ends of adjacent openings are positioned close enough to each other that their diffusion regions merge, thereby raising the device breakdown voltage to that of the cylindrical junction portion along the straight edges of the junction. In an alternative embodiment, the openings do not have round ends and are positioned close enough together that their diffusions merge end to end.</abstract><edition>4</edition><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Vertical double diffused metal oxide semiconductor VDMOS device with increased safe operating area and method |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T01%3A57%3A34IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=CHOW;%20TAT-SING%20P&rft.date=1989-01-31&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS4801986A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |