Semiconductor device passivated with phosphosilicate glass over silicon nitride
The semiconductor device includes a layer of silicon nitride (Si3N4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of...
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creator | DAWSON ROBERT H SCHNABLE GEORGE L |
description | The semiconductor device includes a layer of silicon nitride (Si3N4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed. |
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A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.</description><edition>4</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1987</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19870526&DB=EPODOC&CC=US&NR=4668973A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25551,76302</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19870526&DB=EPODOC&CC=US&NR=4668973A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>DAWSON; ROBERT H</creatorcontrib><creatorcontrib>SCHNABLE; GEORGE L</creatorcontrib><title>Semiconductor device passivated with phosphosilicate glass over silicon nitride</title><description>The semiconductor device includes a layer of silicon nitride (Si3N4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1987</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqFirEKwjAURbM4iPoNvh9wqlQdi7S4OVTnEpKrfRDzQhLj71vF3eFw4HDm6tzjwUa8fZoskSwKG1DQKXHRGZZenEcKo6QP7NhMle5uGkgKIn2bePKcI1ss1eymXcLq54Vad-3leNogyIAUtIFHHq79tq73h13VVP-PNxOfN3o</recordid><startdate>19870526</startdate><enddate>19870526</enddate><creator>DAWSON; ROBERT H</creator><creator>SCHNABLE; GEORGE L</creator><scope>EVB</scope></search><sort><creationdate>19870526</creationdate><title>Semiconductor device passivated with phosphosilicate glass over silicon nitride</title><author>DAWSON; ROBERT H ; SCHNABLE; GEORGE L</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US4668973A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1987</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>DAWSON; ROBERT H</creatorcontrib><creatorcontrib>SCHNABLE; GEORGE L</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>DAWSON; ROBERT H</au><au>SCHNABLE; GEORGE L</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Semiconductor device passivated with phosphosilicate glass over silicon nitride</title><date>1987-05-26</date><risdate>1987</risdate><abstract>The semiconductor device includes a layer of silicon nitride (Si3N4) beneath a phosphosilicate glass (PSG) layer. A silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.</abstract><edition>4</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Semiconductor device passivated with phosphosilicate glass over silicon nitride |
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