Error concealment system

The error concealment system of the invention is for use with a delta modulation or delta signal modulation decoder which decodes digital signals received through a transmission or storage medium from an encoder. The encoder groups the digital signals into a plurality of blocks of one bit words. The decoder also receives from the encoder information related to the number of 1's in each of the blocks of one bit words before transmission or storage. The system comprises means for deriving information on the number of 1's in each received block of words and for comparing such information to the information received from the encoder to determine the presence and polarity of any bit errors. The system further includes means for introducing into each received block determined to contain one or more errors at least one bit error of the opposite polarity from that determined to conceal at least some of the effects of the bit errors.