Phase-locked loop capable of generating a plurality of stable frequency signals
A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with th...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | COX JEFFREY L HATCH DOUGLAS J |
description | A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with the multiplexer, the oscillator outputs to a programmable divider which, in turn, is coupled to an input of the phase sensitive detector, the other input thereto being coupled to a reference oscillator. The dividing factors for the programmable divider are inputted thereto, in synchronism with the multiplexer, from a memory. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US4629999A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US4629999A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US4629999A3</originalsourceid><addsrcrecordid>eNrjZPAPyEgsTtXNyU_OTk1RyMnPL1BITixITMpJVchPU0hPzUstSizJzEtXSFQoyCktSszJLKkEyRSXgNWkFaUWlqbmJVcqFGem5yXmFPMwsKYBqVReKM3NIO_mGuLsoZtakB-fWlyQmAw0siQ-NNjEzMgSCByNCasAAHPtNmU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Phase-locked loop capable of generating a plurality of stable frequency signals</title><source>esp@cenet</source><creator>COX; JEFFREY L ; HATCH; DOUGLAS J</creator><creatorcontrib>COX; JEFFREY L ; HATCH; DOUGLAS J</creatorcontrib><description>A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with the multiplexer, the oscillator outputs to a programmable divider which, in turn, is coupled to an input of the phase sensitive detector, the other input thereto being coupled to a reference oscillator. The dividing factors for the programmable divider are inputted thereto, in synchronism with the multiplexer, from a memory.</description><edition>4</edition><language>eng</language><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES ; BASIC ELECTRONIC CIRCUITRY ; ELECTRICITY</subject><creationdate>1986</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861216&DB=EPODOC&CC=US&NR=4629999A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19861216&DB=EPODOC&CC=US&NR=4629999A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>COX; JEFFREY L</creatorcontrib><creatorcontrib>HATCH; DOUGLAS J</creatorcontrib><title>Phase-locked loop capable of generating a plurality of stable frequency signals</title><description>A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with the multiplexer, the oscillator outputs to a programmable divider which, in turn, is coupled to an input of the phase sensitive detector, the other input thereto being coupled to a reference oscillator. The dividing factors for the programmable divider are inputted thereto, in synchronism with the multiplexer, from a memory.</description><subject>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</subject><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>ELECTRICITY</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1986</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAPyEgsTtXNyU_OTk1RyMnPL1BITixITMpJVchPU0hPzUstSizJzEtXSFQoyCktSszJLKkEyRSXgNWkFaUWlqbmJVcqFGem5yXmFPMwsKYBqVReKM3NIO_mGuLsoZtakB-fWlyQmAw0siQ-NNjEzMgSCByNCasAAHPtNmU</recordid><startdate>19861216</startdate><enddate>19861216</enddate><creator>COX; JEFFREY L</creator><creator>HATCH; DOUGLAS J</creator><scope>EVB</scope></search><sort><creationdate>19861216</creationdate><title>Phase-locked loop capable of generating a plurality of stable frequency signals</title><author>COX; JEFFREY L ; HATCH; DOUGLAS J</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US4629999A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1986</creationdate><topic>AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES</topic><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>ELECTRICITY</topic><toplevel>online_resources</toplevel><creatorcontrib>COX; JEFFREY L</creatorcontrib><creatorcontrib>HATCH; DOUGLAS J</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>COX; JEFFREY L</au><au>HATCH; DOUGLAS J</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Phase-locked loop capable of generating a plurality of stable frequency signals</title><date>1986-12-16</date><risdate>1986</risdate><abstract>A phase-locked loop capable of generating a plurality of stable frequncy signals. This loop includes a plurality of voltage controlled oscillators which are sequentially coupled to the output of a phase sensitive detector by a multiplexer. RF switches then sequentially couple, in synchronism with the multiplexer, the oscillator outputs to a programmable divider which, in turn, is coupled to an input of the phase sensitive detector, the other input thereto being coupled to a reference oscillator. The dividing factors for the programmable divider are inputted thereto, in synchronism with the multiplexer, from a memory.</abstract><edition>4</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US4629999A |
source | esp@cenet |
subjects | AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES BASIC ELECTRONIC CIRCUITRY ELECTRICITY |
title | Phase-locked loop capable of generating a plurality of stable frequency signals |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T20%3A27%3A08IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=COX;%20JEFFREY%20L&rft.date=1986-12-16&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS4629999A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |