Programmable logic array with self correction of faults
An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the...
Gespeichert in:
Hauptverfasser: | , , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | SCHUETT DIETER GOETZE VOLKMAR |
description | An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the PLA and which initiates a test procedure. The cross point latches are automatically loaded with test patterns and the output of the PLA is analyzed to locate the defective part, for example, a damaged cross point transistor, short circuited or open line. The dummy lines are repersonalized automatically to replace lines which are defective themselves or which are connected to defective crosspoints. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US4380811A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US4380811A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US4380811A3</originalsourceid><addsrcrecordid>eNrjZDAPKMpPL0rMzU1MyklVyMlPz0xWSCwqSqxUKM8syVAoTs1JU0jOLypKTS7JzM9TyE9TSEsszSkp5mFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8aHBJsYWBhaGho7GhFUAADWxLWI</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Programmable logic array with self correction of faults</title><source>esp@cenet</source><creator>SCHUETT; DIETER ; GOETZE; VOLKMAR</creator><creatorcontrib>SCHUETT; DIETER ; GOETZE; VOLKMAR</creatorcontrib><description>An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the PLA and which initiates a test procedure. The cross point latches are automatically loaded with test patterns and the output of the PLA is analyzed to locate the defective part, for example, a damaged cross point transistor, short circuited or open line. The dummy lines are repersonalized automatically to replace lines which are defective themselves or which are connected to defective crosspoints.</description><language>eng</language><subject>BASIC ELECTRONIC CIRCUITRY ; CALCULATING ; COMPUTING ; COUNTING ; ELECTRIC DIGITAL DATA PROCESSING ; ELECTRICITY ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; PULSE TECHNIQUE ; TESTING</subject><creationdate>1983</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19830419&DB=EPODOC&CC=US&NR=4380811A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19830419&DB=EPODOC&CC=US&NR=4380811A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>SCHUETT; DIETER</creatorcontrib><creatorcontrib>GOETZE; VOLKMAR</creatorcontrib><title>Programmable logic array with self correction of faults</title><description>An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the PLA and which initiates a test procedure. The cross point latches are automatically loaded with test patterns and the output of the PLA is analyzed to locate the defective part, for example, a damaged cross point transistor, short circuited or open line. The dummy lines are repersonalized automatically to replace lines which are defective themselves or which are connected to defective crosspoints.</description><subject>BASIC ELECTRONIC CIRCUITRY</subject><subject>CALCULATING</subject><subject>COMPUTING</subject><subject>COUNTING</subject><subject>ELECTRIC DIGITAL DATA PROCESSING</subject><subject>ELECTRICITY</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>PULSE TECHNIQUE</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1983</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZDAPKMpPL0rMzU1MyklVyMlPz0xWSCwqSqxUKM8syVAoTs1JU0jOLypKTS7JzM9TyE9TSEsszSkp5mFgTUvMKU7lhdLcDPJuriHOHrqpBfnxqcUFicmpeakl8aHBJsYWBhaGho7GhFUAADWxLWI</recordid><startdate>19830419</startdate><enddate>19830419</enddate><creator>SCHUETT; DIETER</creator><creator>GOETZE; VOLKMAR</creator><scope>EVB</scope></search><sort><creationdate>19830419</creationdate><title>Programmable logic array with self correction of faults</title><author>SCHUETT; DIETER ; GOETZE; VOLKMAR</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US4380811A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1983</creationdate><topic>BASIC ELECTRONIC CIRCUITRY</topic><topic>CALCULATING</topic><topic>COMPUTING</topic><topic>COUNTING</topic><topic>ELECTRIC DIGITAL DATA PROCESSING</topic><topic>ELECTRICITY</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>PULSE TECHNIQUE</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>SCHUETT; DIETER</creatorcontrib><creatorcontrib>GOETZE; VOLKMAR</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>SCHUETT; DIETER</au><au>GOETZE; VOLKMAR</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Programmable logic array with self correction of faults</title><date>1983-04-19</date><risdate>1983</risdate><abstract>An apparatus and a method to automatically locate defects and to automatically insert and personalize dummy lines in a PLA having latches controlling the cross points of the AND and OR array. Upon occurrence of an error in the PLA, a check signal is generated which interrupts normal operation of the PLA and which initiates a test procedure. The cross point latches are automatically loaded with test patterns and the output of the PLA is analyzed to locate the defective part, for example, a damaged cross point transistor, short circuited or open line. The dummy lines are repersonalized automatically to replace lines which are defective themselves or which are connected to defective crosspoints.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US4380811A |
source | esp@cenet |
subjects | BASIC ELECTRONIC CIRCUITRY CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS PULSE TECHNIQUE TESTING |
title | Programmable logic array with self correction of faults |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-21T10%3A48%3A43IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=SCHUETT;%20DIETER&rft.date=1983-04-19&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS4380811A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |