Memory Error Tracking and Logging

Techniques are disclosed relating to memory error tracking and logging. In some embodiments, a memory cache controller circuitry is configured to track, using multiple circuit entries, numbers of detected correctable errors associated with multiple respective locations, and in response to detecting...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	VASH, James, NEMATI, Farid, KUMAR, Derek R, HUTSELL, Steven R, MATHEWS, Gregory S, NANGIA, Era K, SEMERIA, Bernard J
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!