SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING

A method is provided. The method includes etching a substrate to form a recess in the substrate through a plurality of stages. A first one of the plurality of stages forms an inhibitor layer lining an initial portion of the recess based on first etchant radicals. A second one of the plurality of sta...

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Hauptverfasser: BIOLSI, Peter, ZHANG, Du, LEFEVRE, Scott, SHEARER, Jeffrey
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creator BIOLSI, Peter
ZHANG, Du
LEFEVRE, Scott
SHEARER, Jeffrey
description A method is provided. The method includes etching a substrate to form a recess in the substrate through a plurality of stages. A first one of the plurality of stages forms an inhibitor layer lining an initial portion of the recess based on first etchant radicals. A second one of the plurality of stages exposes the initial portion of the recess based on ions. A third one of the plurality of stages extends the initial portion of the recess based on second etchant radicals.
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fullrecord <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024395557A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024395557A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024395557A13</originalsourceid><addsrcrecordid>eNrjZNANjgwOcfUNVnD0c1HwdQ3x8HcJVnDzD1IIdvX1dPb3cwl1DgHyXEOcPTz93HkYWNMSc4pTeaE0N4OyG0hKN7UgPz61uCAxOTUvtSQ-NNjIwMjE2NLU1NTc0dCYOFUAaTQmow</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING</title><source>esp@cenet</source><creator>BIOLSI, Peter ; ZHANG, Du ; LEFEVRE, Scott ; SHEARER, Jeffrey</creator><creatorcontrib>BIOLSI, Peter ; ZHANG, Du ; LEFEVRE, Scott ; SHEARER, Jeffrey</creatorcontrib><description>A method is provided. The method includes etching a substrate to form a recess in the substrate through a plurality of stages. A first one of the plurality of stages forms an inhibitor layer lining an initial portion of the recess based on first etchant radicals. A second one of the plurality of stages exposes the initial portion of the recess based on ions. A third one of the plurality of stages extends the initial portion of the recess based on second etchant radicals.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241128&amp;DB=EPODOC&amp;CC=US&amp;NR=2024395557A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20241128&amp;DB=EPODOC&amp;CC=US&amp;NR=2024395557A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>BIOLSI, Peter</creatorcontrib><creatorcontrib>ZHANG, Du</creatorcontrib><creatorcontrib>LEFEVRE, Scott</creatorcontrib><creatorcontrib>SHEARER, Jeffrey</creatorcontrib><title>SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING</title><description>A method is provided. The method includes etching a substrate to form a recess in the substrate through a plurality of stages. A first one of the plurality of stages forms an inhibitor layer lining an initial portion of the recess based on first etchant radicals. A second one of the plurality of stages exposes the initial portion of the recess based on ions. A third one of the plurality of stages extends the initial portion of the recess based on second etchant radicals.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNANjgwOcfUNVnD0c1HwdQ3x8HcJVnDzD1IIdvX1dPb3cwl1DgHyXEOcPTz93HkYWNMSc4pTeaE0N4OyG0hKN7UgPz61uCAxOTUvtSQ-NNjIwMjE2NLU1NTc0dCYOFUAaTQmow</recordid><startdate>20241128</startdate><enddate>20241128</enddate><creator>BIOLSI, Peter</creator><creator>ZHANG, Du</creator><creator>LEFEVRE, Scott</creator><creator>SHEARER, Jeffrey</creator><scope>EVB</scope></search><sort><creationdate>20241128</creationdate><title>SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING</title><author>BIOLSI, Peter ; ZHANG, Du ; LEFEVRE, Scott ; SHEARER, Jeffrey</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024395557A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>BIOLSI, Peter</creatorcontrib><creatorcontrib>ZHANG, Du</creatorcontrib><creatorcontrib>LEFEVRE, Scott</creatorcontrib><creatorcontrib>SHEARER, Jeffrey</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>BIOLSI, Peter</au><au>ZHANG, Du</au><au>LEFEVRE, Scott</au><au>SHEARER, Jeffrey</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING</title><date>2024-11-28</date><risdate>2024</risdate><abstract>A method is provided. The method includes etching a substrate to form a recess in the substrate through a plurality of stages. A first one of the plurality of stages forms an inhibitor layer lining an initial portion of the recess based on first etchant radicals. A second one of the plurality of stages exposes the initial portion of the recess based on ions. A third one of the plurality of stages extends the initial portion of the recess based on second etchant radicals.</abstract><oa>free_for_read</oa></addata></record>
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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title SYSTEMS AND METHODS FOR SEMICONDUCTOR ETCHING
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-29T03%3A01%3A07IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=BIOLSI,%20Peter&rft.date=2024-11-28&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024395557A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true