MEMORY DEVICE WITH A MULTIPLEXER CIRCUIT AND MULTIPLE INPUT/OUTPUT INTERFACES

A memory device including a first plane group, a second plane group and a multiplexer circuit. The multiplexer circuit is coupled to a first input/output (I/O) interface and a second I/O interface. The multiplexer circuit enables the first I/O interface to access the first plane group and the second...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Siau, Chang H, Parry, Jonathan S
Format: Patent
Sprache:eng
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Zusammenfassung:A memory device including a first plane group, a second plane group and a multiplexer circuit. The multiplexer circuit is coupled to a first input/output (I/O) interface and a second I/O interface. The multiplexer circuit enables the first I/O interface to access the first plane group and the second plane group and enables the second I/O interface to access the first plane group and the second plane group.