FEEDBACK-BASED CLOCK FREQUENCY ADJUSTMENT FOR DYNAMIC CLOCK VOLTAGE SCALING

An apparatus, including: a set of one or more cores; a processor configured to generate a proposed frequency of a clock signal provided to the set of one or more cores in accordance with a dynamic clock voltage scaling (DCVS); a feedback-based clock frequency adjuster configured to generate an adjus...

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Hauptverfasser: DEBNATH, Monobrata, TOUZNI, Azzedine Adam, IDAPALAPATI, Anantha Ramaiah
Format: Patent
Sprache:eng
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