SCALABLE, OPTIMAL RETIMING OF MULTI-CLOCKED NETLISTS

Embodiments of the present disclosure provide enhanced systems and methods for implementing enhanced retiming of multiple clock netlists to improve integrated circuit (IC) design quality and provide enhanced retiming with reduced retiming runtime. Disclosed embodiments provide effective and efficien...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KANZELMAN, Robert Lowell, DUREJA, Rohit, BAUMGARTNER, Jason Raymond, GAJAVELLY, Raj Kumar
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!