Protection Layer Formation during Plasma Etching Conductive Materials
A method of processing a substrate that includes: forming a patterned hardmask layer over a conductive layer to be etched, the conductive layer disposed over a substrate; and patterning the conductive layer using the patterned hardmask layer as an etch mask, by performing a cyclic plasma etch proces...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Joy, Nicholas Lu, Yen-Tien Chang, Shihsheng |
description | A method of processing a substrate that includes: forming a patterned hardmask layer over a conductive layer to be etched, the conductive layer disposed over a substrate; and patterning the conductive layer using the patterned hardmask layer as an etch mask, by performing a cyclic plasma etch process to gradually form a recess in the conductive layer, each cycle of the cyclic plasma etch process including exposing the substrate to a first plasma including a halogen to etch the conductive layer, and exposing the substrate to a second plasma including a silicon-containing precursor to deposit a silicon-containing protective layer over a top surface of the patterned hardmask layer. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_US2024371655A1</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>US2024371655A1</sourcerecordid><originalsourceid>FETCH-epo_espacenet_US2024371655A13</originalsourceid><addsrcrecordid>eNrjZHANKMovSU0uyczPU_BJrEwtUnDLL8pNBPNTSosy89IVAnISi3MTFVxLkjNAXOf8vJRSoIayVAXfxJLUoszEnGIeBtY0IJXKC6W5GZTdXEOcPXRTC_LjU4sLEpNT81JL4kODjQyMTIzNDc1MTR0NjYlTBQDJZzQ4</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Protection Layer Formation during Plasma Etching Conductive Materials</title><source>esp@cenet</source><creator>Joy, Nicholas ; Lu, Yen-Tien ; Chang, Shihsheng</creator><creatorcontrib>Joy, Nicholas ; Lu, Yen-Tien ; Chang, Shihsheng</creatorcontrib><description>A method of processing a substrate that includes: forming a patterned hardmask layer over a conductive layer to be etched, the conductive layer disposed over a substrate; and patterning the conductive layer using the patterned hardmask layer as an etch mask, by performing a cyclic plasma etch process to gradually form a recess in the conductive layer, each cycle of the cyclic plasma etch process including exposing the substrate to a first plasma including a halogen to etch the conductive layer, and exposing the substrate to a second plasma including a silicon-containing precursor to deposit a silicon-containing protective layer over a top surface of the patterned hardmask layer.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241107&DB=EPODOC&CC=US&NR=2024371655A1$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76516</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20241107&DB=EPODOC&CC=US&NR=2024371655A1$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Joy, Nicholas</creatorcontrib><creatorcontrib>Lu, Yen-Tien</creatorcontrib><creatorcontrib>Chang, Shihsheng</creatorcontrib><title>Protection Layer Formation during Plasma Etching Conductive Materials</title><description>A method of processing a substrate that includes: forming a patterned hardmask layer over a conductive layer to be etched, the conductive layer disposed over a substrate; and patterning the conductive layer using the patterned hardmask layer as an etch mask, by performing a cyclic plasma etch process to gradually form a recess in the conductive layer, each cycle of the cyclic plasma etch process including exposing the substrate to a first plasma including a halogen to etch the conductive layer, and exposing the substrate to a second plasma including a silicon-containing precursor to deposit a silicon-containing protective layer over a top surface of the patterned hardmask layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZHANKMovSU0uyczPU_BJrEwtUnDLL8pNBPNTSosy89IVAnISi3MTFVxLkjNAXOf8vJRSoIayVAXfxJLUoszEnGIeBtY0IJXKC6W5GZTdXEOcPXRTC_LjU4sLEpNT81JL4kODjQyMTIzNDc1MTR0NjYlTBQDJZzQ4</recordid><startdate>20241107</startdate><enddate>20241107</enddate><creator>Joy, Nicholas</creator><creator>Lu, Yen-Tien</creator><creator>Chang, Shihsheng</creator><scope>EVB</scope></search><sort><creationdate>20241107</creationdate><title>Protection Layer Formation during Plasma Etching Conductive Materials</title><author>Joy, Nicholas ; Lu, Yen-Tien ; Chang, Shihsheng</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_US2024371655A13</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>Joy, Nicholas</creatorcontrib><creatorcontrib>Lu, Yen-Tien</creatorcontrib><creatorcontrib>Chang, Shihsheng</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Joy, Nicholas</au><au>Lu, Yen-Tien</au><au>Chang, Shihsheng</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Protection Layer Formation during Plasma Etching Conductive Materials</title><date>2024-11-07</date><risdate>2024</risdate><abstract>A method of processing a substrate that includes: forming a patterned hardmask layer over a conductive layer to be etched, the conductive layer disposed over a substrate; and patterning the conductive layer using the patterned hardmask layer as an etch mask, by performing a cyclic plasma etch process to gradually form a recess in the conductive layer, each cycle of the cyclic plasma etch process including exposing the substrate to a first plasma including a halogen to etch the conductive layer, and exposing the substrate to a second plasma including a silicon-containing precursor to deposit a silicon-containing protective layer over a top surface of the patterned hardmask layer.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_US2024371655A1 |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | Protection Layer Formation during Plasma Etching Conductive Materials |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-14T12%3A36%3A59IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Joy,%20Nicholas&rft.date=2024-11-07&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EUS2024371655A1%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |