BIAS CONTROL FOR MEMORY CELLS WITH MULTIPLE GATE ELECTRODES

Disclosed herein are related to a memory device including a memory cell and a bias supply circuit providing a bias voltage to the memory cell. In one aspect, the bias supply circuit includes a bias memory cell coupled to the memory cell, where the bias memory cell and the memory cell may be of a sam...

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Bibliographische Detailangaben
Hauptverfasser: HORNG, Jaw-Juinn, TSAO, Szu-Chun
Format: Patent
Sprache:eng
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